CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Description CD40192BMS Presettable BCD Up/Down Counter and the CD40193BMS Presettable Binary Up/Down Counter each con sist of 4 synchronously clocked, gated “D” type flip-flops connected as a counter.  

Synchronous 4-Bit Up/Down Decade Counter . Synchronous 4-Bit Up/Down Binary Counter

General Description The CD40192BC and CD40193BC up/down counters are monolithic complementary MOS (CMOS) integrated circuits. The CD40192BC is a BCD counter, while the CD40193BC is a binary counter. Counting up and counting down is performed by two count inputs, one being held HIGH while the othe

Synchronous 4-Bit Up/Down Decade Counter

文件：141.69 Kbytes Page：6 Pages

4位递增/递减二进制计数器

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

Synchronous 4-Bit Up/Down Decade Counter . Synchronous 4-Bit Up/Down Binary Counter

General Description The CD40192BC and CD40193BC up/down counters are monolithic complementary MOS (CMOS) integrated circuits. The CD40192BC is a BCD counter, while the CD40193BC is a binary counter. Counting up and counting down is performed by two count inputs, one being held HIGH while the othe

Synchronous 4-Bit Up/Down Decade Counter . Synchronous 4-Bit Up/Down Binary Counter

General Description The CD40192BC and CD40193BC up/down counters are monolithic complementary MOS (CMOS) integrated circuits. The CD40192BC is a BCD counter, while the CD40193BC is a binary counter. Counting up and counting down is performed by two count inputs, one being held HIGH while the othe

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

CMOS Presettable Up/Down Counters(Dual Clock With Reset)

Features • CD40192BMS - BCD Type • CD40193BMS - Binary Type • High Voltage Type (20V Rating) • Individual Clock Lines for Counting Up or Counting Down • Synchronous High-Speed Carry and Borrow Propagation Delays for Cascading • Asynchronous Reset and Preset Capability • Medium Speed Operat

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Description CD40192BMS Presettable BCD Up/Down Counter and the CD40193BMS Presettable Binary Up/Down Counter each con sist of 4 synchronously clocked, gated “D” type flip-flops connected as a counter.  

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

CMOS Presettable Up/Down Counters (Dual Clock With Reset)

Features: Individual clock lines for counting up or counting down Synchronous high-speed carry and borrow propagation delays for cascading Asynchronous reset and preset capability Medium-speed operation—fcy = 8 MHz (typ) @ 10 V 5.V, 10-V, and 15-V parametric ratings Standardized, symmetrica

CMOS PRESETTABLE UP/DOWN COUNTERS(DUAL CLOCK WITH RESET)

文件：516.35 Kbytes Page：11 Pages

CMOs Presettable Up/Down counters

文件：1.11003 Mbytes Page：15 Pages

Synchronous 4-Bit Up/Down Decade Counter

文件：141.69 Kbytes Page：6 Pages

IC COUNTER BINARY UP/DOWN 16-DIP

封装/外壳：16-DIP（0.300"，7.62mm） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC UP/DOWN COUNTR BINARY 16-DIP 集成电路（IC） 计数器，除法器

CMOS Pressettable Up/Down Counters

文件：1.11213 Mbytes Page：16 Pages

CMOs Presettable Up/Down counters

文件：1.11003 Mbytes Page：15 Pages

CMOS PRESETTABLE UP/DOWN COUNTERS(DUAL CLOCK WITH RESET)

文件：516.35 Kbytes Page：11 Pages

CMOS Pressettable Up/Down Counters

文件：1.11213 Mbytes Page：16 Pages

CMOs Presettable Up/Down counters

文件：1.11003 Mbytes Page：15 Pages

CMOs Presettable Up/Down counters

文件：1.11003 Mbytes Page：15 Pages

CMOS Pressettable Up/Down Counters

文件：1.11213 Mbytes Page：16 Pages

CMOS PRESETTABLE UP/DOWN COUNTERS(DUAL CLOCK WITH RESET)

文件：516.35 Kbytes Page：11 Pages

Synchronous 4-Bit Up/Down Decade Counter

文件：141.69 Kbytes Page：6 Pages

CMOs Presettable Up/Down counters

文件：1.11003 Mbytes Page：15 Pages

CMOS 可预置二进制加/减计数器（具有重置功能的双时钟）

CMOS Pressettable Up/Down Counters

文件：1.11213 Mbytes Page：16 Pages

CMOs Presettable Up/Down counters

文件：1.11003 Mbytes Page：15 Pages

封装/外壳：16-SOIC（0.209"，5.30mm 宽） 包装：管件 描述：IC COUNTER BINARY UP/DOWN 16SO 集成电路（IC） 计数器，除法器

CMOS PRESETTABLE UP/DOWN COUNTERS(DUAL CLOCK WITH RESET)

文件：516.35 Kbytes Page：11 Pages

CMOs Presettable Up/Down counters

文件：1.11003 Mbytes Page：15 Pages

CMOS Pressettable Up/Down Counters

文件：1.11213 Mbytes Page：16 Pages

CMOS Pressettable Up/Down Counters

文件：1.11213 Mbytes Page：16 Pages

CMOS PRESETTABLE UP/DOWN COUNTERS(DUAL CLOCK WITH RESET)

文件：516.35 Kbytes Page：11 Pages

CMOS Pressettable Up/Down Counters

文件：1.11213 Mbytes Page：16 Pages

CMOs Presettable Up/Down counters

文件：1.11003 Mbytes Page：15 Pages

CMOS Pressettable Up/Down Counters

文件：1.11213 Mbytes Page：16 Pages

CMOS Pressettable Up/Down Counters

文件：1.11213 Mbytes Page：16 Pages

CMOS Pressettable Up/Down Counters

文件：1.11213 Mbytes Page：16 Pages

CMOs Presettable Up/Down counters

文件：1.11003 Mbytes Page：15 Pages

CMOS PRESETTABLE UP/DOWN COUNTERS(DUAL CLOCK WITH RESET)

文件：516.35 Kbytes Page：11 Pages

CMOS Pressettable Up/Down Counters

文件：1.11213 Mbytes Page：16 Pages

CMOS Pressettable Up/Down Counters

文件：1.11213 Mbytes Page：16 Pages

4-bit up/down binary counter

4-bit up/down binary counter