CMOS 4 Bit Arithmetic Logic Unit

Description The CD40181BMS is a low power four bit parallel arithmetic logic unit (ALU) capable of providing 16 binary arithmetic operations on two four-bit words and 16 logical functions of two Boolean variables. The mode control input M selects logical (M = High) or arithmetic (M = Low) opera

CMOS Look-Ahead Carry Generator

Description The CD40182BMS is a high-speed look-ahead carry gener ator capable of anticipating a carry across four binary adders or groups of adders. The CD40182BMS is cascadable to perform full look-ahead across n-bit adders. Carry, propagate-carry, and generate-carry functions are provided as

CMOS Presettable Divide-By- N Counter

Description\nCD4018BMS types consist of 5 Johnson-Counter stages, buffered Q outputs from each stage, and counter preset control gating. • High Voltage Type (20V Rating)\n• Medium Speed Operation 10MHz (typ.) at VDD - VSS = 10V\n• Fully Static Operation\n• 100% Tested for Quiescent Current at 20V\n• Standardized Symmetrical Output Characteristics\n• 5V, 10V and 15V Parametric Ratings\n• Maximum Input Current of 1µa at 18V Over Fu;

CMOS PRESETTABLE DIVIDE-BY-N COUNTER

文件：245.17 Kbytes Page：12 Pages

丝印代码：CD4018BE；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

丝印代码：CD4018BE；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

丝印代码：CD4018BF；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

丝印代码：CD4018BF；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

丝印代码：CD4018BF3A；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

丝印代码：CD4018BF3A；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

丝印代码：CD4018BM；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

丝印代码：CD4018BM；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

丝印代码：CD4018BM；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

丝印代码：CD4018BM；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

丝印代码：CD4018B；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

丝印代码：CD4018B；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

CMOS 4 Bit Arithmetic Logic Unit

Description The CD40181BMS is a low power four bit parallel arithmetic logic unit (ALU) capable of providing 16 binary arithmetic operations on two four-bit words and 16 logical functions of two Boolean variables. The mode control input M selects logical (M = High) or arithmetic (M = Low) opera

CMOS 4 Bit Arithmetic Logic Unit

Description The CD40181BMS is a low power four bit parallel arithmetic logic unit (ALU) capable of providing 16 binary arithmetic operations on two four-bit words and 16 logical functions of two Boolean variables. The mode control input M selects logical (M = High) or arithmetic (M = Low) opera

CMOS Look-Ahead Carry Generator

Description The CD40182BMS is a high-speed look-ahead carry gener ator capable of anticipating a carry across four binary adders or groups of adders. The CD40182BMS is cascadable to perform full look-ahead across n-bit adders. Carry, propagate-carry, and generate-carry functions are provided as

CMOS Look-Ahead Carry Generator

Description\nThe CD40182BMS is a high-speed look-ahead carry gener ator capable of anticipating a carry across four binary adders or groups of adders. The CD40182BMS is cascadable to perform full look-ahead across n-bit adders. Carry, propagate-carry, and generate-carry functions are provided as enu • High Voltage Type (20V Rating)\n• Generates High-Speed Carry Across Four Adders or Adder Groups\n• High-Speed Operation\n- tPHL, tPLH =100 ns (typ) at VDD = 10V\n• Cascadable for Fast Carries Over N Bits\n• Designed for Use with CD40181BMS ALU\n• 100% Tested for Quiescent Current at 20V\n• 5V,;

CMOS Look-Ahead Carry Generator

Description The CD40182BMS is a high-speed look-ahead carry gener ator capable of anticipating a carry across four binary adders or groups of adders. The CD40182BMS is cascadable to perform full look-ahead across n-bit adders. Carry, propagate-carry, and generate-carry functions are provided as

CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

CMOS 可预置 N 分频计数器

CD4018B types consist of 5 Johnson-Counter stages, buffered Q outputs from each stage, and counter preset control gating. CLOCK, RESET, DATA, PRESET ENABLE, and 5 individual JAM inputs are provided. Divide by 10, 8, 6, 4, or 2 counter configurations can be implemented by feeding the Q\\5, Q\\4, Q\\3 • Medium speed operation……10 MHz (typ.) at VDD – VSS = 10 V\n• 100% tested for quiescent current at 20 V\n• 5-V, 10-V, and 15-V parametric ratings\n• Noise margin (full package-temperature range) =         1 V at VDD = 5 V         2 V at VDD = 10 V      2.5 V at VDD = 15 V\n• Applications: \n• ;

CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

CMOS Presettable Divide-By- “N” Counter

Description CD4018BMS types consist of 5 Johnson-Counter stages, buffered Q outputs from each stage, and counter preset control gating. Features • High Voltage Type (20V Rating) • Medium Speed Operation 10MHz (typ.) at VDD - VSS = 10V • Fully Static Operation • 100 Tested for Q

丝印代码：CM018B；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

丝印代码：CM018B；CMOS Presettable Divide-By-N Counter

Features: Medium speed operation. . . . . .10MHz (typ. at Vpp - Vs = 10V Fully static operation = 100% tested for quiescent current at 20 V = Standardized, symmetrical output characteristics = 5-V, 10-V, and 15-V parametric ratings Maximum input current of 1 uA at 18 V over full pack

CMOS PRESETTABLE DIVIDE-BY-N COUNTER

文件：245.17 Kbytes Page：12 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS PRESETTABLE DIVIDE-BY-N COUNTER

文件：245.17 Kbytes Page：12 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS PRESETTABLE DIVIDE-BY-N COUNTER

文件：245.17 Kbytes Page：12 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS PRESETTABLE DIVIDE-BY-N COUNTER

文件：245.17 Kbytes Page：12 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS PRESETTABLE DIVIDE-BY-N COUNTER

文件：245.17 Kbytes Page：12 Pages

CMOS PRESETTABLE DIVIDE-BY-N COUNTER

文件：245.17 Kbytes Page：12 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC DIV-BY-N COUNTR PRESET 16SOIC 集成电路（IC） 计数器，除法器

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC DIV-BY-N COUNTR PRESET 16SOIC 集成电路（IC） 计数器，除法器

CMOS PRESETTABLE DIVIDE-BY-N COUNTER

文件：245.17 Kbytes Page：12 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS PRESETTABLE DIVIDE-BY-N COUNTER

文件：245.17 Kbytes Page：12 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS PRESETTABLE DIVIDE-BY-N COUNTER

文件：245.17 Kbytes Page：12 Pages

CMOS Presettable Divide-by -N counter

文件：980.08 Kbytes Page：17 Pages

CMOS PRESETTABLE DIVIDE-BY-N COUNTER

文件：245.17 Kbytes Page：12 Pages

PRESETTABLE DIVIDE-BY-N COUNTER

DESCRIPTION The HCC4018B (extended temperature range) and HCF4018B (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in-line plastic or ceramic package and plastic micropackage. ■ MEDIUM SPEED OPERATION - 10MHz (typ.) AT VDD – VSS = 10V ■ FULLY STATIC

PRESETTABLE DIVIDE-BY-N COUNTER

DESCRIPTION The HCC4018B (extended temperature range) and HCF4018B (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in-line plastic or ceramic package and plastic micropackage. ■ MEDIUM SPEED OPERATION - 10MHz (typ.) AT VDD – VSS = 10V ■ FULLY STATIC

PRESETTABLE DIVIDE-BY-N COUNTER

DESCRIPTION The HCC4018B (extended temperature range) and HCF4018B (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in-line plastic or ceramic package and plastic micropackage. ■ MEDIUM SPEED OPERATION - 10MHz (typ.) AT VDD – VSS = 10V ■ FULLY STATIC

PRESETTABLE DIVIDE-BY-N COUNTER

DESCRIPTION The HCC4018B (extended temperature range) and HCF4018B (intermediate temperature range) are monolithic integrated circuit, available in 16-lead dual in-line plastic or ceramic package and plastic micropackage. ■ MEDIUM SPEED OPERATION - 10MHz (typ.) AT VDD – VSS = 10V ■ FULLY STATIC

4-BIT ARITHMETIC LOGIC UNIT

文件：272.85 Kbytes Page：12 Pages

PRESETTABLE DIVIDE-BY-N COUNTER

Presettable Divide-By-N Counter

Presettable Divdie-By-N Counter

Presettable Divide-By-N Counter

Presettable Divide−By−N Counter

COMPLEMENTARY METAL OXIDE SILICON

PRESTTABLE DIVIDE-BY-N COUNTER