PNP Silicon Digital Transistor

PNP Silicon Digital Transistor • Built in bias resistor (R1= 1 kΩ, R2= 10 kΩ) • Pb-free (RoHS compliant) package • Qualified according AEC Q101

PNP Silicon Digital Transistor (Switching circuit, inverter, interface circuit, driver circuit)

PNP Silicon Digital Transistor • Switching circuit, inverter, interface circuit, driver circuit • Built in resistor (R1=1kΩ,R2=10kΩ)

AF 数字晶体管

PNP硅数字晶体管 • 内置偏置电阻 (R1= 1 kΩ, R2= 10 kΩ)\n• 符合 AEC Q101 标准;

PNP Silicon Digital Transistor

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丝印代码：XHs；PNP Silicon Digital Transistor

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PNP Silicon Digital Transistor

文件：138.41 Kbytes Page：6 Pages

PNP Silicon Digital Transistor

文件：531.41 Kbytes Page：6 Pages

封装/外壳：TO-236-3，SC-59，SOT-23-3 包装：卷带（TR） 描述：TRANS PREBIAS PNP 0.33W SOT23-3 分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置

封装/外壳：TO-236-3，SC-59，SOT-23-3 包装：卷带（TR） 描述：TRANS PREBIAS PNP 300MW SOT23-3 分立半导体产品 晶体管 - 双极（BJT）- 单，预偏置

Octal D-type transparent latch with 5-volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC573A is a high-performance, low-power, low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families. Inputs can be driven from either 3.3V or 5V devices. In 3-State operation, outputs can handle 5V. This feature allows the use of these devices as

Octal D-Type Latch with 3-State Outputs With 5 V?뭈olerant Inputs

The MC74LVX573 is an advanced high speed CMOS octal latch with 3−state outputs. The inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V systems to 3.0 V systems. This 8−bit D−type latch is controlled by a latch enable input and an output enable input. When the output enable inpu

Schottky Barrier Rectifier

Description: The NTE573 is an axial lead metal–to–silicon power diode using the Schottky Barrier principle. State–of–the–art geometry features epitaxial construction with oxide passivation and metal overlap contact. This device is ideally suited for use in low–voltage, high–frequency inverters, a

P-CHANNEL MOS FET 5-PIN 2 CIRCUITS FOR SWITCHING

P-CHANNEL MOS FET (5-PIN 2 CIRCUITS) FOR SWITCHING The µPA573T is a super-mini-mold device provided with two MOS FET circuits. It achieves high-density mounting and saves mounting costs. FEATURES • Two source common MOS FET circuits in package the same size as SC-70 • Directly driven by ICs ha

OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS

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