Dual Differential PECL to CMOS/TTL Translator

DESCRIPTION The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate design of the ELT23 makes it ideal for applications that require the transla

Dual Differential PECL to CMOS/TTL Translator

[ARIZONA MICROTEK, INC.] DESCRIPTION The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate design of the ELT23 makes it ideal for application

Dual Differential PECL to CMOS/TTL Translator

DESCRIPTION The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate design of the ELT23 makes it ideal for applications that require the transla

Dual Differential PECL to CMOS Translator

The AZ100ELT23 is a dual differential PECL to CMOS/TTL translator. Because PECL (Positive ECL) levels are used, only VCC and ground are required. The small outline 8-lead packaging and the low skew, dual gate design of the AZ100ELT23 makes it ideal for applications that require the translation of a • 3.5ns propagation delay\n• <500ps output to output skew\n\n\n• Differential PECL inputs\n• CMOS/TTL outputs\n\n\n• 5V analog supply\n• Industrial Temp Range: -40°C to 85°C;

Dual Differential PECL to CMOS/TTL Translator

文件：409.81 Kbytes Page：6 Pages

Dual Differential PECL to TTL Translator

The MC100ELT23 is a dual differential PECL to TTL translator. Because PECL (Positive ECL) levels are used, only +5 V and ground are required. The small outline 8-lead package and the dual gate design of the ELT23 makes it ideal for applications which require the translation of a clock and a data s

3.3V DUAL DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR

DESCRIPTION The SY10/100ELT23L are dual differential LVPECL to-LVTTL translators with +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8- pin SOIC package and the low skew, dual gate design of the ELT23L make

3.3V DUAL DIFFERENTIAL LVPECL-to-LVTTL TRANSLATOR

DESCRIPTION The SY10/100ELT23L are dual differential LVPECL to-LVTTL translators with +3.3V power supply. Because LVPECL (Low Voltage Positive ECL) levels are used, only +3.3V and ground are required. The small outline 8- pin SOIC package and the low skew, dual gate design of the ELT23L make

DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR

DESCRIPTION The SY10/100ELT23 are dual differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew dual gate design of the ELT23 makes it ideal for applications which require the transl

DUAL DIFFERENTIAL PECL-to-TTL TRANSLATOR

DESCRIPTION The SY10/100ELT23 are dual differential PECL-to-TTL translators. Because PECL (Positive ECL) levels are used, only +5V and ground are required. The small outline 8-lead SOIC package and the low skew dual gate design of the ELT23 makes it ideal for applications which require the transl