Two-wire Serial EEPROM

文件：726.04 Kbytes Page：24 Pages

Two-wire Serial EEPROM 256K (32,768 x 8)

文件：980.69 Kbytes Page：24 Pages

封装/外壳：8-TSSOP（0.173"，4.40mm 宽） 包装：托盘 描述：IC EEPROM 256KBIT I2C 8TSSOP 集成电路（IC） 存储器

Two-wire Serial EEPROM 256K (32,768 x 8)

文件：980.69 Kbytes Page：24 Pages

封装/外壳：8-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC EEPROM 256KBIT I2C 8TSSOP 集成电路（IC） 存储器

Two-wire Serial EEPROM

文件：726.04 Kbytes Page：24 Pages

2-Wire Serial EEPROMs

Features • Low Voltage and Standard Voltage Operation – 5.0 (VCC = 4.5V to 5.5V) – 2.7 (VCC = 2.7V to 5.5V) – 1.8 (VCC = 1.8V to 3.6V) • Internally Organized 16,384 x 8 and 32,768 x 8 • 2-Wire Serial Interface • Schmitt Trigger, Filtered Inputs for Noise Suppression • Bidirectional Data Tr

256 KBit 2-Wire Bus Interface Serial EEPROM with Write Protect

General Description The FM24C256/C256L/C256LZ devices are 256 Kbits CMOS nonvolatile electrically erasable memory. These devices offer the designer different low voltage and low power options. They conform to all requirements in the Extended IIC 2-wire protocol. Furthermore, they are designed to

2-Wire Serial EEPROMs

Description The AT24C128/256 provides 131,072/262,144 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 16,384/32,768 words of 8 bits each. The device’s cascadable feature allows up to 4 devices to share a common Two-wire bus. The device is optimized for

262,144-bit 2-WIRE SERIAL CMOS EEPROM

DESCRIPTION The IS24C256 is an electrically erasable PROM device that uses the standard 2-wire interface for communications. The IS24C256 contains a memory array of 256K-bits (32,768 x 8), and is further subdivided into 512 pages of 64 bytes each for PageWrite mode. This EEPROM is offered in wide

CMOS I2C 2-WIRE BUS 128K/256K ELECTRICALLY ERASABLE PROGRAMMABLE ROM 16K/32K X 8 BIT EEPROM

[Turbo IC, Inc.] DESCRIPTION: The Turbo IC 24C128/24C256 is a serial 128K/256K EEPROM fabricated with Turbo’s proprietary, high reliability, high performance CMOS technology. It’s 128K/256K of memory is organized as 16384/32768 x 8 bits. The memory is configured as 256/512 pages with each page c