Space FPGA Configuration EEPROM

Description The AT17LV010-10DP is a FPGA Configuration Serial EEPROM provides an easy-to use, cost-effective configuration memory for Field Programmable Gate Arrays. It is packaged in the 28-pin 400 mils wide FP package. Configurator uses a simple serial access procedure to configure one or mor

Space FPGA Configuration EEPROM

Description The AT17LV010-10DP is a FPGA Configuration Serial EEPROM provides an easy-to use, cost-effective configuration memory for Field Programmable Gate Arrays. It is packaged in the 28-pin 400 mils wide FP package. Configurator uses a simple serial access procedure to configure one or mor

Space FPGA Configuration EEPROM

文件：145.05 Kbytes Page：11 Pages

MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 1 MEGABIT SERIAL EEPROM, MONOLITHIC SILICON

文件：137.73 Kbytes Page：15 Pages

FPGA Configuration EEPROM Memory

Description The AT17C65/128/256 and AT17LV65/128/256 (low-density AT17 Series) FPGA Configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration memory for Field Programmable Gate Arrays. The low-density AT17 Series is packaged in the 8-pin PDIP, 8-lead SOIC, and the

FPGA Configuration EEPROM Memory

Description The AT17C65/128/256 and AT17LV65/128/256 (low-density AT17 Series) FPGA Configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration memory for Field Programmable Gate Arrays. The low-density AT17 Series is packaged in the 8-pin PDIP, 8-lead SOIC, and the

FPGA Configuration EEPROM Memory

Description The AT17C65/128/256 and AT17LV65/128/256 (low-density AT17 Series) FPGA Configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration memory for Field Programmable Gate Arrays. The low-density AT17 Series is packaged in the 8-pin PDIP, 8-lead SOIC, and the

FPGA Configuration EEPROM Memory

Description The AT17C65/128/256 and AT17LV65/128/256 (low-density AT17 Series) FPGA Configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration memory for Field Programmable Gate Arrays. The low-density AT17 Series is packaged in the 8-pin PDIP, 8-lead SOIC, and the

FPGA Configuration EEPROM Memory

文件：637.18 Kbytes Page：26 Pages