3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Functional description The AS7C33128PFS32B and AS7C33128PFS36B are high-performance CMOS 4-Mbit synchronous Static Random Access Memory (SRAM) devices organized as 131,072 words × 32 or 36 bits, and incorporate a two-stage register-register pipeline for highest frequency on any given technology.

3.3V 128K X 32/36 pipeline burst synchronous SRAM

Features • Organization: 131,072 words × 32 or 36 bits • Fast clock speeds to 200 MHz in LVTTL/LVCMOS • Fast clock to data access: 3.0/3.1/3.5/4.0/5.0 ns • Fast OE access time: 3.0/3.1/3.5/4.0/5.0 ns • Fully synchronous register-to-register operation • Single register “Flow-throu