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AP2509

10 TO 2500 MHzTO-8 CASCADABLE AMPLIFIER

文件:159.82 Kbytes Page:2 Pages

TELEDYNE

华特力科

AP2509

Amplifiers

Teledyne RF & Microwave

50-150 MHz 1:9 SDRAM clock driver

DESCRIPTION The PCK2509S is a high-performance, low-skew, low-jitter, phase-locked loop (PLL) clock driver. It uses a PLLto precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The PC

PHILIPS

飞利浦

50-150 MHz 1:9 SDRAM clock driver

DESCRIPTION The PCK2509SA is a high-performance, low-skew, low-jitter, phase-locked loop (PLL) clock driver. It uses a PLL to precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The

PHILIPS

飞利浦

50-150 MHz 1:9 SDRAM clock driver

DESCRIPTION The PCK2509S is a high-performance, low-skew, low-jitter, phase-locked loop (PLL) clock driver. It uses a PLLto precisely align, in both frequency and phase, the feedback (FBOUT) output to the clock (CLK) input signal. It is specifically designed for use with synchronous DRAMs. The PC

PHILIPS

飞利浦

VIDEO SUPER INPOSER WITH Y-C MIXER

文件:194 Kbytes Page:5 Pages

NJRC

日本无线

VIDEO SUPER INPOSER WITH Y-C MIXER

文件:194 Kbytes Page:5 Pages

NJRC

日本无线

AP2509产品属性

  • 类型

    描述

  • hfreq:

    2500

  • ssgtyp:

    8.5

  • ssgmin:

    8

  • ssgmax:

    7.5

  • gfmin:

    0.5

  • gfmax:

    0.8

  • nftyp:

    4.3

  • nfmin:

    5

  • nfmax:

    5.5

  • potyp:

    27.5

  • pomin:

    26

  • pomax:

    25.5

  • rityp:

    17

  • iptyp:

    40

  • swmin:

    1.7

  • swmax:

    1.8

  • vnom:

    15

  • vmatypp:

    185

  • package:

    TO-8

更新时间:2026-8-2 16:20:00
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