12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

FEATURES · Maximum Sample Rate: 170 MSPS · 12-Bit Resolution · No Missing Codes · Total Power Dissipation 1.1 W · Internal Sample and Hold · 70.5-dBFS SNR at 70-MHz IF · 84-dBc SFDR at 70-MHz IF · 11 bits ENOB Minimum at 70-MHz IF · Double Data Rate (DDR) LVDS and Parallel CMOS Output Op

12 位、170MSPS 模数转换器 (ADC)

ADS5525 is a high performance 12-bit, 170-MSPS A/D converter. It offers state-of-the art functionality and performance using advanced techniques to minimize board space. Using an internal sample and hold and low jitter clock buffer, the ADC supports both high SNR and high SFDR at high input frequenc • Maximum Sample Rate: 170 MSPS\n• 12-Bit Resolution\n• No Missing Codes\n• Total Power Dissipation 1.1 W\n• Internal Sample and Hold\n• 70.5-dBFS SNR at 70-MHz IF\n• 84-dBc SFDR at 70-MHz IF\n• 11 bits ENOB Minimum at 70-MHz IF\n• Double Data Rate (DDR) LVDS and Parallel CMOS Output Options\n• Prog;

14-BIT, 210 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

文件：1.78614 Mbytes Page：57 Pages

12-BIT, 210 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

文件：1.75953 Mbytes Page：57 Pages

11-BIT, 200 MSPS ADC

文件：1.6055 Mbytes Page：54 Pages

12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

文件：2.24705 Mbytes Page：59 Pages

12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

文件：806.55 Kbytes Page：48 Pages

丝印代码：AZ5525；12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

FEATURES · Maximum Sample Rate: 170 MSPS · 12-Bit Resolution · No Missing Codes · Total Power Dissipation 1.1 W · Internal Sample and Hold · 70.5-dBFS SNR at 70-MHz IF · 84-dBc SFDR at 70-MHz IF · 11 bits ENOB Minimum at 70-MHz IF · Double Data Rate (DDR) LVDS and Parallel CMOS Output Op

丝印代码：AZ5525；12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

FEATURES · Maximum Sample Rate: 170 MSPS · 12-Bit Resolution · No Missing Codes · Total Power Dissipation 1.1 W · Internal Sample and Hold · 70.5-dBFS SNR at 70-MHz IF · 84-dBc SFDR at 70-MHz IF · 11 bits ENOB Minimum at 70-MHz IF · Double Data Rate (DDR) LVDS and Parallel CMOS Output Op

丝印代码：AZ5525；12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

FEATURES · Maximum Sample Rate: 170 MSPS · 12-Bit Resolution · No Missing Codes · Total Power Dissipation 1.1 W · Internal Sample and Hold · 70.5-dBFS SNR at 70-MHz IF · 84-dBc SFDR at 70-MHz IF · 11 bits ENOB Minimum at 70-MHz IF · Double Data Rate (DDR) LVDS and Parallel CMOS Output Op

丝印代码：AZ5525；12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

FEATURES · Maximum Sample Rate: 170 MSPS · 12-Bit Resolution · No Missing Codes · Total Power Dissipation 1.1 W · Internal Sample and Hold · 70.5-dBFS SNR at 70-MHz IF · 84-dBc SFDR at 70-MHz IF · 11 bits ENOB Minimum at 70-MHz IF · Double Data Rate (DDR) LVDS and Parallel CMOS Output Op

丝印代码：AZ5525；12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

FEATURES · Maximum Sample Rate: 170 MSPS · 12-Bit Resolution · No Missing Codes · Total Power Dissipation 1.1 W · Internal Sample and Hold · 70.5-dBFS SNR at 70-MHz IF · 84-dBc SFDR at 70-MHz IF · 11 bits ENOB Minimum at 70-MHz IF · Double Data Rate (DDR) LVDS and Parallel CMOS Output Op

丝印代码：AZ5525；12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

FEATURES · Maximum Sample Rate: 170 MSPS · 12-Bit Resolution · No Missing Codes · Total Power Dissipation 1.1 W · Internal Sample and Hold · 70.5-dBFS SNR at 70-MHz IF · 84-dBc SFDR at 70-MHz IF · 11 bits ENOB Minimum at 70-MHz IF · Double Data Rate (DDR) LVDS and Parallel CMOS Output Op

12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

文件：2.24705 Mbytes Page：59 Pages

封装/外壳：48-VFQFN 裸露焊盘 包装：托盘 描述：IC ADC 12BIT PIPELINED 48VQFN 集成电路（IC） 模数转换器（ADC）

封装/外壳：48-VFQFN 裸露焊盘 包装：管件 描述：IC ADC 12BIT PIPELINED 48VQFN 集成电路（IC） 模数转换器（ADC）

12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

文件：806.55 Kbytes Page：48 Pages

12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

文件：2.24705 Mbytes Page：59 Pages

12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

文件：2.24705 Mbytes Page：59 Pages

12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

文件：806.55 Kbytes Page：48 Pages

12-BIT, 170 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS

文件：2.24705 Mbytes Page：59 Pages

ZENER DIODE CHIPS

• 1N5518B THRU 1N5546B AVAILABLE IN JANHC AND JANKC PER MIL-PRF-19500/437 • ZENER DIODE CHIPS • ALL JUNCTIONS COMPLETELY PROTECTED WITH SILICON DIOXIDE • ELECTRICALLY EQUIVALENT TO 1N5518B THRU 1N5546B • 0.5 WATT CAPABILITY WITH PROPER HEAT SINKING • COMPATIBLE WITH ALL WIRE BONDING

ZENER DIODE, 500mW

• 1N5518BUR-1 THRU 1N5546BUR-1 AVAILABLE IN JAN, JANTX AND JANTXV PER MIL-PRF-19500/437 • ZENER DIODE, 500mW • LEADLESS PACKAGE FOR SURFACE MOUNT • LOW REVERSE LEAKAGE CHARACTERISTICS • METALLURGICALLY BONDED

16 BIT / 20 BIT MULTI RANGE ADC WITH 4 BIT LATCH

General Description The 16-bit CS5525 and the 20-bit CS5526 are highly in tegrated ∆ΣA/D converters which include an instrumentation amplifier, a PGA (programmable gain amplifier), eight digital filters, and self and system calibration circuitry. Features ● Delta-sigma A/D Converter - Linea

16 BIT / 20 BIT MULTI RANGE ADC WITH 4 BIT LATCH

General Description The 16-bit CS5525 and the 20-bit CS5526 are highly in tegrated ∆ΣA/D converters which include an instrumentation amplifier, a PGA (programmable gain amplifier), eight digital filters, and self and system calibration circuitry. Features ● Delta-sigma A/D Converter - Linea

16 BIT / 20 BIT MULTI RANGE ADC WITH 4 BIT LATCH

General Description The 16-bit CS5525 and the 20-bit CS5526 are highly in tegrated ∆ΣA/D converters which include an instrumentation amplifier, a PGA (programmable gain amplifier), eight digital filters, and self and system calibration circuitry. Features ● Delta-sigma A/D Converter - Linea