Continuous Rate 10 Mbps to 2.7 Gbps Clock and Data Recovery ICs

GENERAL DESCRIPTION The ADN2817/ADN2818 provide the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 10 Mbps to 2.7 Gbps. The ADN2817/ADN2818 automatically lock to all data rates without the need for an external reference clock or

Continuous Rate 10 Mbps to 2.7 Gbps Clock and Data Recovery ICs

FEATURES Serial data input: 10 Mbps to 2.7 Gbps Exceeds ITU-T jitter specifications Integrated limiting amplifier 5 mV p-p sensitivity (ADN2817 only) Adjustable slice level: ±100 mV (ADN2817 only) Proprietary dual-loop clock recovery architecture Programmable LOS detect (ADN2817 only) Inte

封装/外壳：32-WFQFN 裸露焊盘，CSP 包装：卷带（TR） 描述：IC CLOCK/DATA RECOVERY 32-LFCSP 集成电路（IC） 应用特定时钟/定时

Continuous Rate 10 Mbps to 2.7 Gbps Clock and Data Recovery ICs

FEATURES Serial data input: 10 Mbps to 2.7 Gbps Exceeds ITU-T jitter specifications Integrated limiting amplifier 5 mV p-p sensitivity (ADN2817 only) Adjustable slice level: ±100 mV (ADN2817 only) Proprietary dual-loop clock recovery architecture Programmable LOS detect (ADN2817 only) Inte

Continuous Rate 12.3Mb/s to 2.7Gb/s Clock and Data Recovery ICs

GENERAL DESCRIPTION The ADN2817/ADN2818 provide the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 10 Mbps to 2.7 Gbps. The ADN2817/ADN2818 automatically lock to all data rates without the need for an external reference clock or

Continuous Rate 10 Mbps to 2.7 Gbps Clock and Data Recovery ICs

FEATURES Serial data input: 10 Mbps to 2.7 Gbps Exceeds ITU-T jitter specifications Integrated limiting amplifier 5 mV p-p sensitivity (ADN2817 only) Adjustable slice level: ±100 mV (ADN2817 only) Proprietary dual-loop clock recovery architecture Programmable LOS detect (ADN2817 only) Inte

Continuous Rate 10 Mbps to 2.7 Gbps Clock and Data Recovery ICs

GENERAL DESCRIPTION The ADN2817/ADN2818 provide the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 10 Mbps to 2.7 Gbps. The ADN2817/ADN2818 automatically lock to all data rates without the need for an external reference clock or

Continuous Rate 10 Mbps to 2.7 Gbps Clock and Data Recovery ICs

GENERAL DESCRIPTION The ADN2817/ADN2818 provide the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 10 Mbps to 2.7 Gbps. The ADN2817/ADN2818 automatically lock to all data rates without the need for an external reference clock or

Continuous Rate 10 Mbps to 2.7 Gbps Clock and Data Recovery ICs

FEATURES Serial data input: 10 Mbps to 2.7 Gbps Exceeds ITU-T jitter specifications Integrated limiting amplifier 5 mV p-p sensitivity (ADN2817 only) Adjustable slice level: ±100 mV (ADN2817 only) Proprietary dual-loop clock recovery architecture Programmable LOS detect (ADN2817 only) Inte

封装/外壳：32-WFQFN 裸露焊盘，CSP 包装：托盘 描述：IC CLOCK/DATA RECOVERY 32-LFCSP 集成电路（IC） 应用特定时钟/定时

7 dB negative slope equalizer

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Shorty Bushings

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7 dB negative slope equalizer

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