PLL Frequency Synthesizer

GENERAL DESCRIPTION The ADF4108 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable r

PLL Frequency Synthesizer

FEATURES 8.0 GHz bandwidth 3.2 V to 3.6 V power supply Separate charge pump supply (VP) allows extended voltage in 3.3 V systems Programmable, dual-modulus prescaler 8/9, 16/17, 32/33, or 64/65 Programmable charge pump currents Programmable antibacklash pulse width 3-wire serial interface

8 GHz整数N分频PLL

ADF4108频率合成器在无线接收机和发射机的上变频和下变频部分中，可用来实现本振。它由低噪声数字鉴频鉴相器(PFD)、精密电荷泵、可编程参考分频器、可编程A和B计数器以及双模预分频器(P/P+1)组成。A（6位）、B（13位）计数器与双模预分频器(P/P+1)配合，可实现N分频器(N = BP + A)。此外，14位参考分频器（R计数器）允许PFD输入端的REFIN 频率为可选值。如果频率合成器与外部环路滤波器和电压控制振荡器(VCO)一起使用，则可以实现完整的锁相环(PLL)。其带宽极高(8GHz)，因此许多高频系统可以省去倍频器或预分频器，从而简化系统架构并降低成本。 • 带宽：8.0 GHz\n\n• 3.2 V至3.6 V电源供电\n\n• 独立的电荷泵电源(VP) 可在3.3 V系统中提供扩展的调谐电压\n\n• 可编程双模预分频器：8/9、16/17、32/33或64/65\n\n• 可编程电荷泵电流;

PLL Frequency Synthesizer

FEATURES 8.0 GHz bandwidth 3.2 V to 3.6 V power supply Separate charge pump supply (VP) allows extended voltage in 3.3 V systems Programmable, dual-modulus prescaler 8/9, 16/17, 32/33, or 64/65 Programmable charge pump currents Programmable antibacklash pulse width 3-wire serial interface

PLL Frequency Synthesizer

FEATURES 8.0 GHz bandwidth 3.2 V to 3.6 V power supply Separate charge pump supply (VP) allows extended voltage in 3.3 V systems Programmable, dual-modulus prescaler 8/9, 16/17, 32/33, or 64/65 Programmable charge pump currents Programmable antibacklash pulse width 3-wire serial interface

PLL Frequency Synthesizer

GENERAL DESCRIPTION The ADF4108 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable r

PLL Frequency Synthesizer

GENERAL DESCRIPTION The ADF4108 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable r

PLL Frequency Synthesizer

FEATURES 8.0 GHz bandwidth 3.2 V to 3.6 V power supply Separate charge pump supply (VP) allows extended voltage in 3.3 V systems Programmable, dual-modulus prescaler 8/9, 16/17, 32/33, or 64/65 Programmable charge pump currents Programmable antibacklash pulse width 3-wire serial interface

PLL Frequency Synthesizer

FEATURES 8.0 GHz bandwidth 3.2 V to 3.6 V power supply Separate charge pump supply (VP) allows extended voltage in 3.3 V systems Programmable, dual-modulus prescaler 8/9, 16/17, 32/33, or 64/65 Programmable charge pump currents Programmable antibacklash pulse width 3-wire serial interface

PLL Frequency Synthesizer

GENERAL DESCRIPTION The ADF4108 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable r

PLL Frequency Synthesizer

GENERAL DESCRIPTION The ADF4108 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable r

PLL Frequency Synthesizer

GENERAL DESCRIPTION The ADF4108 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable r

PLL Frequency Synthesizer

GENERAL DESCRIPTION The ADF4108 frequency synthesizer can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. It consists of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable r

PLL Frequency Synthesizer

SCOPE This specification documents the detail requirements for space qualified product manufactured on Analog Devices, Inc.s QML certified line per MIL-PRF-38535 Level V except as modified herein.

PLL Frequency Synthesizer

SCOPE This specification documents the detail requirements for space qualified product manufactured on Analog Devices, Inc.s QML certified line per MIL-PRF-38535 Level V except as modified herein.

封装/外壳：20-WFQFN 裸露焊盘，CSP 包装：托盘 描述：IC PLL FREQUENCY SYNTH 20-LFCSP 集成电路（IC） 时钟发生器，PLL，频率合成器

封装/外壳：20-WFQFN 裸露焊盘，CSP 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC PLL FREQUENCY SYNTH 20-LFCSP 集成电路（IC） 时钟发生器，PLL，频率合成器

ZENER DIODE CHIPS

• 1N4099 THRU 1N4135 AVAILABLE IN JANHC AND JANKC PER MIL-PRF-19500/435 • ZENER DIODE CHIPS • ALL JUNCTIONS COMPLETELY PROTECTED WITH SILICON DIOXIDE • 0.5 WATT CAPABILITY WITH PROPER HEAT SINKING • ELECTRICALLY EQUIVALENT TO 1N4099 THRU 1N4135 • COMPATIBLE WITH ALL WIRE BONDING AND DIE ATTAC

LEADLESS PACKAGE FOR SURFACE MOUNT

• 1N4099UR-1 THRU 1N4135UR-1 AVAILABLE IN JAN, JANTX, JANTXV AND JANS PER MIL-PRF-19500/435 • LEADLESS PACKAGE FOR SURFACE MOUNT • LOW CURRENT OPERATION AT 250 µA • METALLURGICALLY BONDED • DOUBLE PLUG CONSTRUCTION

LOW NOISE ZENER DIODE 6.8 VOLTS THRU 47 VOLTS 500mW, 5 TOLERANCE

DESCRIPTION: The CENTRAL SEMICONDUCTOR CLL4099 Series types are high quality Silicon Zener Diodes designed for low leakage, low current and low noise applications.

PNP Epitaxial Silicon Transistor

Switching Application (Bias Resistor Built In) • Switching circuit, Inverter, Interface circuit, Driver Circuit • Built in bias Resistor (R1=47KΩ, R2=22KΩ) • Complement to FJV3108R

ZERO VOLTAGE CROSSING 800 V TRIAC DRIVER OPTOCOUPLER

DESCRIPTION The IL4108 consists of a GaAs IRLED optically coupled to a photosensitive zero crossing TRIAC network. The TRIAC consists of two inverse parallel connected monolithic SCRs. These three semiconductors are assembled in a six pin 0.3 inch dual in-line package, using high insulation dou