ADC12C105 12-Bit, 95/105 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch)

High Performance Quad DVGA

1FEATURES 2• OIP3: 49dBm at 200MHz • Noise Figure: 8.5dB • Voltage Gain: 26dB • 1dB Gain Steps • Enable Pins Active in SPI Mode • −3dB Bandwidth of 1400 MHz • Gain Step Accuracy: 0.2 dB • Disable Function for Each Channel • Parallel and Serial Gain Control • Low Power Mode for Power Mana

12 位、105MSPS、1.0GHz 输入带宽模数转换器 (ADC)

The ADC12C105 is a high-performance CMOS analog-to-digital converter capable of converting analog input signals into 12-bit digital words at rates up to 105 Mega Samples Per Second (MSPS). This converter uses a differential, pipelined architecture with digital error correction and an on-chip sample- • 1 GHz Full Power Bandwidth\n• Low Power Consumption\n• Clock Duty Cycle Stabilizer\n• Power-Down Mode\n• Resolution: 12 Bits\n• SNR: (fIN = 240 MHz) 69 dBFS (typ)\n• Full Power Bandwidth: 1 GHz (typ)\n• 350 mW (typ), VA=3.0 V\n• 400 mW (typ), VA=3.3 V;

95/105 MSPS A/D Converter

文件：1.30403 Mbytes Page：32 Pages

12-Bit, 95/105 MSPS A/D Converter

文件：451.4 Kbytes Page：24 Pages

丝印代码：12C105；ADC12C105 12-Bit, 95/105 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch)

丝印代码：12C105；ADC12C105 12-Bit, 95/105 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch)

丝印代码：12C105；ADC12C105 12-Bit, 95/105 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch)

丝印代码：12C105；ADC12C105 12-Bit, 95/105 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch)

丝印代码：12C105；ADC12C105 12-Bit, 95/105 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch)

丝印代码：12C105；ADC12C105 12-Bit, 95/105 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch)

丝印代码：12C105；ADC12C105 12-Bit, 95/105 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch)

丝印代码：12C105；ADC12C105 12-Bit, 95/105 MSPS A/D Converter

1FEATURES 2• 1 GHz Full Power Bandwidth • Internal Reference and Sample-and-Hold Circuit • Low Power Consumption • Data Ready Output Clock • Clock Duty Cycle Stabilizer • Single +3.0V or +3.3V Supply Operation sample• Power-Down Mode • 32-Pin WQFN Package, (5x5x0.8mm, 0.5mm Pin-Pitch)

12-Bit, 95/105 MSPS A/D Converter

文件：451.4 Kbytes Page：24 Pages

95/105 MSPS A/D Converter

文件：1.30403 Mbytes Page：32 Pages

封装/外壳：32-WFQFN 裸露焊盘 包装：管件 描述：IC ADC 12BIT PIPELINED 32WQFN 集成电路（IC） 模数转换器（ADC）

12-Bit, 95/105 MSPS A/D Converter

文件：451.4 Kbytes Page：24 Pages

95/105 MSPS A/D Converter

文件：1.30403 Mbytes Page：32 Pages

封装/外壳：32-WFQFN 裸露焊盘 包装：管件 描述：IC ADC 12BIT PIPELINED 32WQFN 集成电路（IC） 模数转换器（ADC）

95/105 MSPS A/D Converter

文件：1.30403 Mbytes Page：32 Pages

95/105 MSPS A/D Converter

文件：1.30403 Mbytes Page：32 Pages

12-Bit, 95/105 MSPS A/D Converter

文件：451.4 Kbytes Page：24 Pages