ADC11C125 11-Bit, 125 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS Outputs

1FEATURES 2• 1.1 GHz Full Power Bandwidth • Internal Sample-and-Hold Circuit • Low Power Consumption • Internal Precision 1.0V Reference • Single-Ended or Differential Clock Modes • Clock Duty Cycle Stabilizer • Dual +3.3V and +1.8V Supply Operation sample• Power-Down and Sleep Modes • Of

封装/外壳：48-WFQFN 裸露焊盘 包装：卷带（TR） 描述：IC ADC 11BIT PIPELINED 48WQFN 集成电路（IC） 模数转换器（ADC）

125 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS Outputs

文件：1.15156 Mbytes Page：29 Pages

ADC11C125 11-Bit, 125 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS Outputs

1FEATURES 2• 1.1 GHz Full Power Bandwidth • Internal Sample-and-Hold Circuit • Low Power Consumption • Internal Precision 1.0V Reference • Single-Ended or Differential Clock Modes • Clock Duty Cycle Stabilizer • Dual +3.3V and +1.8V Supply Operation sample• Power-Down and Sleep Modes • Of

High Performance Quad DVGA

1FEATURES 2• OIP3: 49dBm at 200MHz • Noise Figure: 8.5dB • Voltage Gain: 26dB • 1dB Gain Steps • Enable Pins Active in SPI Mode • −3dB Bandwidth of 1400 MHz • Gain Step Accuracy: 0.2 dB • Disable Function for Each Channel • Parallel and Serial Gain Control • Low Power Mode for Power Mana

11-Bit, 125 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS Outputs

文件：489.45 Kbytes Page：24 Pages

125 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS Outputs

文件：1.15156 Mbytes Page：29 Pages

ADC11C125 11-Bit, 125 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS Outputs

1FEATURES 2• 1.1 GHz Full Power Bandwidth • Internal Sample-and-Hold Circuit • Low Power Consumption • Internal Precision 1.0V Reference • Single-Ended or Differential Clock Modes • Clock Duty Cycle Stabilizer • Dual +3.3V and +1.8V Supply Operation sample• Power-Down and Sleep Modes • Of

125 MSPS, 1.1 GHz Bandwidth A/D Converter with CMOS Outputs

文件：1.15156 Mbytes Page：29 Pages