22 μA, RRIO, CMOS, 18 V Operational Amplifier

FEATURES Micropower at high voltage (18 V): 22 μA maximum Low input bias current: 20 pA maximum Gain bandwidth product: 240 kHz at AV =100 typical Unity-gain crossover: 240 kHz −3 dB closed-loop bandwidth: 310 kHz Slew rate: 80 V/ms Large signal voltage gain: 110 dB minimum Single-supply operat

Low Power JFET-Input Op Amps

FEATURES Low input bias current: 50 pA maximum Offset voltage 1.5 mV maximum for B grade (ADA4062-2 SOIC package) 2.5 mV maximum for A grade Offset voltage drift: 5 μV/°C typical Slew rate: 3.3 V/μs typical CMRR: 90 dB typical Low supply current: 165 μA typical High input impedance Unity

四通道、低功耗JFET输入运算放大器

22 關A, RRIO, CMOS, 18 V

文件：696.47 Kbytes Page：24 Pages

Low Power JFET-Input Op Amps

FEATURES Low input bias current: 50 pA maximum Offset voltage 1.5 mV maximum for B grade (ADA4062-2 SOIC package) 2.5 mV maximum for A grade Offset voltage drift: 5 μV/°C typical Slew rate: 3.3 V/μs typical CMRR: 90 dB typical Low supply current: 165 μA typical High input impedance Unity

Low Power JFET-Input Op Amps

FEATURES Low input bias current: 50 pA maximum Offset voltage 1.5 mV maximum for B grade (ADA4062-2 SOIC package) 2.5 mV maximum for A grade Offset voltage drift: 5 μV/°C typical Slew rate: 3.3 V/μs typical CMRR: 90 dB typical Low supply current: 165 μA typical High input impedance Unity

Low Power JFET-Input Op Amps

FEATURES Low input bias current: 50 pA maximum Offset voltage 1.5 mV maximum for B grade (ADA4062-2 SOIC package) 2.5 mV maximum for A grade Offset voltage drift: 5 μV/°C typical Slew rate: 3.3 V/μs typical CMRR: 90 dB typical Low supply current: 165 μA typical High input impedance Unity

Low Power JFET-Input Op Amps

FEATURES Low input bias current: 50 pA maximum Offset voltage 1.5 mV maximum for B grade (ADA4062-2 SOIC package) 2.5 mV maximum for A grade Offset voltage drift: 5 μV/°C typical Slew rate: 3.3 V/μs typical CMRR: 90 dB typical Low supply current: 165 μA typical High input impedance Unity

Low Power JFET-Input Op Amps

FEATURES Low input bias current: 50 pA maximum Offset voltage 1.5 mV maximum for B grade (ADA4062-2 SOIC package) 2.5 mV maximum for A grade Offset voltage drift: 5 μV/°C typical Slew rate: 3.3 V/μs typical CMRR: 90 dB typical Low supply current: 165 μA typical High input impedance Unity