Low Jitter Clock Generator with Eight LVPECL Outputs

GENERAL DESCRIPTION The AD9525 is designed to support converter clock requirements for long-term evolution (LTE) and multicarrier GSM base station designs. The AD9525 provides a low power, multioutput, clock distribution function with low jitter performance, along with an on-chip PLL that can be

封装/外壳：48-WFQFN 裸露焊盘，CSP 包装：托盘 描述：IC CLOCK GENERATOR PLL 48-LFCSP 集成电路（IC） 时钟发生器，PLL，频率合成器