封装/外壳：20-SOIC（0.295"，7.50mm 宽） 包装：托盘 描述：IC CLKDATA RECOVERY PLL 20SOIC 集成电路（IC） 应用特定时钟/定时

Clock Recovery and Data Retiming Phase-Locked Loop

PRODUCT DESCRIPTION The AD800 and AD802 employ a second order phase-locked loop architecture to perform clock recovery and data retiming on Non-Return to Zero, NRZ, data. This architecture is capable of supporting data rates between 20 Mbps and 160 Mbps. The products described here have been defi