True Bipolar Input, Dual 1us, 12-Bit, 2-Channel SAR ADC

GENERAL DESCRIPTION The AD73661 is a dual, 12-bit, high speed, low power, successive approximation ADC that features throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2- channel multiplexer, and a low noise, wide bandwidth track and-hold amplifier that can handle inp

真双极性输入、双核12位、双通道、同时采样SAR ADC

AD7366/AD7367是双核12位/14位、高速、低功耗、逐次逼近型模数转换器(ADC)，最高吞吐量可达1 MSPS。这种器件内置两个ADC，两者之前均配有一个双通道多路复用器及一个低噪声、宽带宽采样保持放大器。\n\n AD7366/AD7367采用ADI公司工业CMOS工艺(iCMOS1)制造，该技术平台兼具低电压和高电压CMOS的优点。利用iCMOS工艺，AD7366/AD7367不仅降低了功耗和封装尺寸，而且能接受高电压双极性信号。AD7366/AD7367可以输入±10 V范围、±5 V范围及0 V至10 V范围内的真双极性模拟信号。\n\n AD7366/A • 双核12位/14位、双通道ADC\n\n• 真双极性模拟输入\n\n• 可编程输入范\n±10 V、±5 V、0 V至10 V\n±12 V（使用3 V外部基准电压） \n\n• 吞吐速率：1 MSPS\n\n• 转换与读取同时进行，时间小于1 μs \n\n• 低功耗： \n正常模式下为8.3 mA（典型值）\n关断模式下为320 nA（典型值）\n\n• 高模拟输入阻抗\n\n• AD7366 \n信噪比：72 dB（50 kHz输入频率）\n12位无失码\n\n• AD7367 \n信噪比：76 dB（50 kHz输入频率）\n14位无失码 \n\n• 精确的2.5 V ± 0.2&;

True Bipolar Input, Dual 1 關s, 12-/14-Bit, 2-Channel SAR ADCs

文件：624.56 Kbytes Page：28 Pages

真双极性输入、12位、双通道、同时采样SAR ADC

AD7366-5/AD7367-51是双核12位/14位、低功耗、逐次逼近型模数转换器(ADC)，最高吞吐量为500 KSPS。每个器件内置两个ADC，两者之前均配有一个双通道多路复用器及一个低噪声、宽带宽采样保持放大器。\n\n AD7366-5/AD7367-5采用ADI公司的工业CMOS工艺(iCMOS® )2制造，该技术平台兼具低电压和高电压CMOS的优点。利用该工艺，这些器件不仅降低了功耗和封装尺寸，而且能接受高电压双极性信号。AD7366-5/AD7367-5可以输入± 10 V范围、± 5 V范围及0 V至+10 V范围内的真双极性模拟信号。\n\n 这些器件 • 双核12位、双通道ADC\n\n• 真双极性模拟输入\n\n• 可编程输入范围\n± 10 V、 ± 5 V、0 V 至 +10 V\n± 12 V（使用+3 V外部基准电压）\n\n• 吞吐量：500 Ksps\n\n• 高模拟输入阻抗\n\n• 低功耗\n正常模式下为5.1 mA（典型值）\n关断模式下为320 nA（典型值）;

True Bipolar Input, Dual 1us, 12-Bit, 2-Channel SAR ADC

GENERAL DESCRIPTION The AD73661 is a dual, 12-bit, high speed, low power, successive approximation ADC that features throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2- channel multiplexer, and a low noise, wide bandwidth track and-hold amplifier that can handle inp

True Bipolar Input, Dual 1us, 12-Bit, 2-Channel SAR ADC

GENERAL DESCRIPTION The AD73661 is a dual, 12-bit, high speed, low power, successive approximation ADC that features throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2- channel multiplexer, and a low noise, wide bandwidth track and-hold amplifier that can handle inp

True Bipolar Input, Dual 1us, 12-Bit, 2-Channel SAR ADC

GENERAL DESCRIPTION The AD73661 is a dual, 12-bit, high speed, low power, successive approximation ADC that features throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2- channel multiplexer, and a low noise, wide bandwidth track and-hold amplifier that can handle inp

True Bipolar Input, Dual 1us, 12-Bit, 2-Channel SAR ADC

GENERAL DESCRIPTION The AD73661 is a dual, 12-bit, high speed, low power, successive approximation ADC that features throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2- channel multiplexer, and a low noise, wide bandwidth track and-hold amplifier that can handle inp

True Bipolar Input, Dual 1us, 12-Bit, 2-Channel SAR ADC

GENERAL DESCRIPTION The AD73661 is a dual, 12-bit, high speed, low power, successive approximation ADC that features throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2- channel multiplexer, and a low noise, wide bandwidth track and-hold amplifier that can handle inp

True Bipolar Input, Dual 1us, 12-Bit, 2-Channel SAR ADC

GENERAL DESCRIPTION The AD73661 is a dual, 12-bit, high speed, low power, successive approximation ADC that features throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2- channel multiplexer, and a low noise, wide bandwidth track and-hold amplifier that can handle inp

True Bipolar Input, Dual 1us, 12-Bit, 2-Channel SAR ADC

GENERAL DESCRIPTION The AD73661 is a dual, 12-bit, high speed, low power, successive approximation ADC that features throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2- channel multiplexer, and a low noise, wide bandwidth track and-hold amplifier that can handle inp

True Bipolar Input, Dual 1us, 12-Bit, 2-Channel SAR ADC

GENERAL DESCRIPTION The AD73661 is a dual, 12-bit, high speed, low power, successive approximation ADC that features throughput rates up to 1 MSPS. The device contains two ADCs, each preceded by a 2- channel multiplexer, and a low noise, wide bandwidth track and-hold amplifier that can handle inp

True Bipolar Input, Dual 1 關s, 12-/14-Bit, 2-Channel SAR ADCs

文件：624.56 Kbytes Page：28 Pages

True Bipolar Input, Dual 12-Bit/14-Bit, 2-Channel, Simultaneous Sampling SAR ADC

文件：682.67 Kbytes Page：29 Pages

True Bipolar Input, Dual 1 關s, 12-/14-Bit, 2-Channel SAR ADCs

文件：624.56 Kbytes Page：28 Pages

True Bipolar Input, 12-/14-Bit, 2-Channel, Simultaneous Sampling SAR ADCs

文件：651.6 Kbytes Page：29 Pages

True Bipolar Input, Dual 1 關s, 12-/14-Bit, 2-Channel SAR ADCs

文件：624.56 Kbytes Page：28 Pages

封装/外壳：24-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC ADC 12BIT SAR 24TSSOP 集成电路（IC） 模数转换器（ADC）

封装/外壳：24-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC ADC 12BIT SAR 24TSSOP 集成电路（IC） 模数转换器（ADC）

True Bipolar Input, Dual 1 關s, 12-/14-Bit, 2-Channel SAR ADCs

文件：624.56 Kbytes Page：28 Pages

True Bipolar Input, Dual 1 關s, 12-/14-Bit, 2-Channel SAR ADCs

文件：624.56 Kbytes Page：28 Pages

DTMF Tone Generator for Pushbutton Telephone?

32 BIT QUADRATURE COUNTER WITH SERIAL INTERFACE

GENERAL DESCRIPTION: LS7366 is a 32-bit CMOS counter, with direct interface for quadrature clocks from incremental encoders. It also interfaces with the index signals from incremental encoders to perform variety of marker functions. GENERAL FEATURES: • Operating voltage: 3.0V to 5.5V (V

FRAME ENGINE AND DATA LINK MANAGER

DESCRIPTION The PM7366 FREEDM-8 Frame Engine and Datalink Manager device is a monolithic integrated circuit that implements HDLC processing, and PCI Bus memory management functions for a maximum of 128 bi-directional channels. FEATURES • Single-chip Peripheral Component Interconnect (PCI) Bus m

Bitstream conversion ADC for digital audio systems

GENERAL DESCRIPTION The SAA7366 is a CMOS cost effective stereo analog-to-digital converter (ADC) using the Philips bitstream conversion technique. FEATURES • Integrated buffers for simple interfacing to analog inputs • 4 flexible serial interface modes • Overload detection of dig

N-Channel 20-V (D-S) MOSFET

文件：78.75 Kbytes Page：5 Pages