12-Bit Low Power Sigma-Delta ADC

GENERAL DESCRIPTION The AD7170 is a very low power 12-bit analog-to-digital converter (ADC). It contains a precision 12-bit sigma-delta (Σ-Δ) ADC and an on-chip oscillator. Consuming only 135 μA, the AD7170 is particularly suitable for portable or battery operated products where very low power is

12-Bit Low Power Sigma-Delta ADC

GENERAL DESCRIPTION The AD7170 is a very low power 12-bit analog-to-digital converter (ADC). It contains a precision 12-bit sigma-delta (Σ-Δ) ADC and an on-chip oscillator. Consuming only 135 μA, the AD7170 is particularly suitable for portable or battery operated products where very low power is

12-Bit Low Power Sigma-Delta ADC

GENERAL DESCRIPTION The AD7170 is a very low power 12-bit analog-to-digital converter (ADC). It contains a precision 12-bit sigma-delta (Σ-Δ) ADC and an on-chip oscillator. Consuming only 135 μA, the AD7170 is particularly suitable for portable or battery operated products where very low power is

16-Bit Low Power Sigma-Delta ADC

GENERAL DESCRIPTION The AD7171 is a very low power, 16-bit, analog-to-digital converter (ADC). It contains a precision, 16-bit, Σ-Δ ADC and an on-chip oscillator. Consuming only 135 µA, the AD7171 is particularly suitable for portable or battery operated products where very low power is a require

Low Cost, Level Shifted Low Side Current Monitor for Negative High Voltage Rails

Low Cost, Level Shifted Low Side Current Monitor for Negative High Voltage Rails The measurement result from the AD7171 is provided as a digital code utilizing a simple 2-wire, SPI-compatible serial interface. The entire circuit operates on a single +3.3 V supply. Optional galvanic isolation is p

16位、低功耗Σ−Δ型ADC

AD7171是一款极低功耗、16位模数转换器(ADC)，内置一个精密16位Σ-Δ型ADC和一个片内振荡器。该器件功耗仅为135 µA，因此特别适合要求极低功耗的便携式或电池供电产品。它还具有关断模式，该模式下的器件功耗仅为5 μA，从而可延长产品的电池使用时间。\n\n 为便于使用，AD7171的所有特性均由专用引脚控制。每次发生数据读取操作时，8个状态位便会附加到16位转换结果上。这些状态位含有一个码序列，可用来确认串行传输的有效性。\n\n AD7171的输出数据速率为125 Hz，建立时间为24 ms。它具有一路差分输入，增益为1。在用户需用外部放大器来满足系统专用滤 • 输出数据速率：125 Hz\n\n• 引脚可编程的掉电和复位功能\n\n• 状态功能\n\n• 内部时钟振荡器\n\n• 电流：135 µA\n\n• 电源：2.7 V至5.25 V\n\n• 温度范围：-40°C至+105°C\n\n• 封装：10引脚3 mm x 3 mm LFCSP封装;

16-Bit Low Power Sigma-Delta ADC

GENERAL DESCRIPTION The AD7171 is a very low power, 16-bit, analog-to-digital converter (ADC). It contains a precision, 16-bit, Σ-Δ ADC and an on-chip oscillator. Consuming only 135 µA, the AD7171 is particularly suitable for portable or battery operated products where very low power is a require

16-Bit Low Power Sigma-Delta ADC

GENERAL DESCRIPTION The AD7171 is a very low power, 16-bit, analog-to-digital converter (ADC). It contains a precision, 16-bit, Σ-Δ ADC and an on-chip oscillator. Consuming only 135 µA, the AD7171 is particularly suitable for portable or battery operated products where very low power is a require

集成真轨到轨缓冲器的低功耗、24位、31.25 KSPS、Σ-Δ型ADC

AD7172-2是一款智能型、低噪声、低功耗、多路复用的Σ-Δ型模数转换器(ADC)，具有2/4通道（全差分/单端）输入，可供低带宽信号使用。 对于完全建立的数据，AD7172-2的最大通道扫描速率为6.21 kSPS (161 μs)。 该器件的输出数据速率范围为1.25 SPS至31.25 kSPS。 \n\n AD7172-2集成关键的模拟和数字信号调理模块，允许用户通过SPI对每一个使用中的模拟输入通道进行单独配置。 模拟输入端和外部基准电压输入端的集成式真轨到轨缓冲器可提供易于驱动的高阻抗输入。 精密2.5 V低漂移(f2 ppm/°C)带隙内部基准电压源（带输出基准电压缓 • 快速且灵活的输出速率： 1.25 SPS至31.25 kSPS \n\n• 通道扫描速率：6.21 kSPS/通道（161 μs建立时间） \n\n• 性能规格\n31.25 kSPS时无噪声位：17.2\n5 SPS时无噪声位：24\nINL： FSR的±2 ppm \n\n• 50 Hz和60 Hz抑制：85 dB，建立时间为50 ms;

低功耗、8/16通道、31.25kSPS、24位、高度集成的Σ-Δ型ADC

AD7173-8是一款快速建立、高度精确、低功耗、8/16通道、多路复用的ADC，适合低带宽输入信号使用，集成输入缓冲器。 \n\n 该器件集成精密2.5 V低漂移(3.5 ppm/°C)带隙基准电压源和振荡器。 \n\n 该器件提供8个灵活的设置，可针对输出数据速率、数字滤波器模式、失调/增益误差校正、基准电压选择、缓冲器使能等进行配置。 \n\n Sinc5 + sinc1滤波器可较大程度提升通道扫描速率，而sinc3滤波器可较大程度提升分辨率并增强50 Hz/60 Hz抑制性能，另外还有4个选项可供选择，较大程度降低噪声。 \n\n 该器件集成诊断 • 低功耗、8/16通道、高度集成的多路复用模数转换器(ADC) \n\n• 集成：\n精密模拟输入缓冲器和基准电压源输入缓冲器\n2.5 V精密基准电压源\n(3.5 ppm/°C)\n交叉点多路复用器（使能系统诊断） \n\n• 8个全差分或16个单端通道\n时钟振荡器\n带自动外部多路复用控制的GPIO和GPO引脚 \n\n• 快速灵活的输出速率：\n1.25 SPS至31.25 kSPS;

Low Power, 8-/16-Channel, 31.25 kSPS, 24-Bit, Highly Integrated Sigma-Delta ADC

GENERAL DESCRIPTION Fast settling, highly accurate, low power, 8-/16-channel, multiplexed ADC for low bandwidth input signals with integrated input buffers. Integrated precision, 2.5 V, low drift (3.5 ppm/°C), band gap reference and integrated oscillator. FEATURES Low power, 8-/16-channel,

Low Power, 8-/16-Channel, 31.25 kSPS, 24-Bit, Highly Integrated Sigma-Delta ADC

GENERAL DESCRIPTION Fast settling, highly accurate, low power, 8-/16-channel, multiplexed ADC for low bandwidth input signals with integrated input buffers. Integrated precision, 2.5 V, low drift (3.5 ppm/°C), band gap reference and integrated oscillator. FEATURES Low power, 8-/16-channel,

Low Power, 8-/16-Channel, 31.25 kSPS, 24-Bit, Highly Integrated Sigma-Delta ADC

GENERAL DESCRIPTION Fast settling, highly accurate, low power, 8-/16-channel, multiplexed ADC for low bandwidth input signals with integrated input buffers. Integrated precision, 2.5 V, low drift (3.5 ppm/°C), band gap reference and integrated oscillator. FEATURES Low power, 8-/16-channel,

24-Bit, 250 kSPS, Sigma-Delta ADC with 20 us Settling and True Rail-to-Rail Buffers

GENERAL DESCRIPTION The AD7175-2 is a low noise, fast settling, multiplexed, 2-/4-channel (fully/pseudo differential) Σ-Δ analog-to-digital converter (ADC) for low bandwidth inputs. It has a maximum channel scan rate of 50 kSPS (20 µs) for fully settled data. The output data rates range from 5 SP

24-Bit, 250 kSPS, Sigma-Delta ADC with 20 us Settling and True Rail-to-Rail Buffers

GENERAL DESCRIPTION The AD7175-2 is a low noise, fast settling, multiplexed, 2-/4-channel (fully/pseudo differential) Σ-Δ analog-to-digital converter (ADC) for low bandwidth inputs. It has a maximum channel scan rate of 50 kSPS (20 µs) for fully settled data. The output data rates range from 5 SP

24-Bit, 250 kSPS, Sigma-Delta ADC with 20 us Settling and True Rail-to-Rail Buffers

GENERAL DESCRIPTION The AD7175-2 is a low noise, fast settling, multiplexed, 2-/4-channel (fully/pseudo differential) Σ-Δ analog-to-digital converter (ADC) for low bandwidth inputs. It has a maximum channel scan rate of 50 kSPS (20 µs) for fully settled data. The output data rates range from 5 SP

24-Bit, 250 kSPS, Sigma-Delta ADC with 20 us Settling and True Rail-to-Rail Buffers

GENERAL DESCRIPTION The AD7175-2 is a low noise, fast settling, multiplexed, 2-/4-channel (fully/pseudo differential) Σ-Δ analog-to-digital converter (ADC) for low bandwidth inputs. It has a maximum channel scan rate of 50 kSPS (20 µs) for fully settled data. The output data rates range from 5 SP

24-Bit, 8-/16-Channel, 250 kSPS, Sigma- Delta ADC with True Rail-to-Rail Buffers

GENERAL DESCRIPTION The AD7175-8 is a low noise, fast settling, multiplexed, 8-/16-channel (fully/pseudo differential) Σ-Δ analog-to-digital converter (ADC) for low bandwidth inputs. It has a maximum channel scan rate of 50 kSPS (20 µs) for fully settled data. The output data rates range from 5 S

24-Bit, 8-/16-Channel, 250 kSPS, Sigma- Delta ADC with True Rail-to-Rail Buffers

GENERAL DESCRIPTION The AD7175-8 is a low noise, fast settling, multiplexed, 8-/16-channel (fully/pseudo differential) Σ-Δ analog-to-digital converter (ADC) for low bandwidth inputs. It has a maximum channel scan rate of 50 kSPS (20 µs) for fully settled data. The output data rates range from 5 S

24-Bit, 8-/16-Channel, 250 kSPS, Sigma- Delta ADC with True Rail-to-Rail Buffers

GENERAL DESCRIPTION The AD7175-8 is a low noise, fast settling, multiplexed, 8-/16-channel (fully/pseudo differential) Σ-Δ analog-to-digital converter (ADC) for low bandwidth inputs. It has a maximum channel scan rate of 50 kSPS (20 µs) for fully settled data. The output data rates range from 5 S

24-Bit, 8-/16-Channel, 250 kSPS, Sigma- Delta ADC with True Rail-to-Rail Buffers

GENERAL DESCRIPTION The AD7175-8 is a low noise, fast settling, multiplexed, 8-/16-channel (fully/pseudo differential) Σ-Δ analog-to-digital converter (ADC) for low bandwidth inputs. It has a maximum channel scan rate of 50 kSPS (20 µs) for fully settled data. The output data rates range from 5 S

The AD7176-2 is a fast settling, highly accurate, high resolution, multiplexed 誇-? analog-to-digital converter (ADC) for low band-width input signals.

GENERAL DESCRIPTION The AD7176-2 is a fast settling, highly accurate, high resolution, multiplexed Σ-Δ analog-to-digital converter (ADC) for low bandwidth input signals. Its inputs can be configured as two fully differential or four pseudo differential inputs via the integrated crosspoint multipl

The AD7176-2 is a fast settling, highly accurate, high resolution, multiplexed 誇-? analog-to-digital converter (ADC) for low band-width input signals.

GENERAL DESCRIPTION The AD7176-2 is a fast settling, highly accurate, high resolution, multiplexed Σ-Δ analog-to-digital converter (ADC) for low bandwidth input signals. Its inputs can be configured as two fully differential or four pseudo differential inputs via the integrated crosspoint multipl

The AD7176-2 is a fast settling, highly accurate, high resolution, multiplexed 誇-? analog-to-digital converter (ADC) for low band-width input signals.

GENERAL DESCRIPTION The AD7176-2 is a fast settling, highly accurate, high resolution, multiplexed Σ-Δ analog-to-digital converter (ADC) for low bandwidth input signals. Its inputs can be configured as two fully differential or four pseudo differential inputs via the integrated crosspoint multipl

12-Bit Low Power Sigma-Delta ADC

文件：370.54 Kbytes Page：15 Pages

12-Bit Low Power Sigma-Delta ADC

文件：370.54 Kbytes Page：15 Pages

12-Bit Low Power Sigma-Delta ADC

文件：370.54 Kbytes Page：15 Pages

12-Bit Low Power Sigma-Delta ADC

文件：370.54 Kbytes Page：15 Pages

封装/外壳：10-VFDFN 裸露焊盘，CSP 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC ADC 12BIT SIGMA-DELTA 10LFCSP 集成电路（IC） 模数转换器（ADC）

16-Bit, Low Power, Sigma-Delta ADC

文件：313.98 Kbytes Page：17 Pages

16-Bit, Low Power, Sigma-Delta ADC

文件：313.98 Kbytes Page：17 Pages

16-Bit, Low Power, Sigma-Delta ADC

文件：313.98 Kbytes Page：17 Pages

封装/外壳：10-VFDFN 裸露焊盘，CSP 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC ADC 16BIT SIGMA-DELTA 10LFCSP 集成电路（IC） 模数转换器（ADC）

16-Bit, Low Power, Sigma-Delta ADC

文件：313.98 Kbytes Page：17 Pages

True rail-to-rail analog and reference input buffers

文件：1.13991 Mbytes Page：61 Pages

True rail-to-rail analog and reference input buffers

文件：1.13991 Mbytes Page：61 Pages

True rail-to-rail analog and reference input buffers

文件：1.13991 Mbytes Page：61 Pages

True rail-to-rail analog and reference input buffers

文件：1.13991 Mbytes Page：61 Pages

ADC with True Rail-to-Rail Buffers

文件：848.19 Kbytes Page：62 Pages

Low Power, 24-Bit, 31.25 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers

文件：1.08455 Mbytes Page：61 Pages

ADC with True Rail-to-Rail Buffers

文件：848.19 Kbytes Page：62 Pages

Low Power, 24-Bit, 31.25 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers

文件：1.08455 Mbytes Page：61 Pages

ADC with True Rail-to-Rail Buffers

文件：848.19 Kbytes Page：62 Pages

ADC with True Rail-to-Rail Buffers

文件：848.19 Kbytes Page：62 Pages

Low Power, 24-Bit, 31.25 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers

文件：1.08455 Mbytes Page：61 Pages

Low Power, 24-Bit, 31.25 kSPS, Sigma-Delta ADC with True Rail-to-Rail Buffers

文件：1.08455 Mbytes Page：61 Pages

ADC with True Rail-to-Rail Buffers

文件：848.19 Kbytes Page：62 Pages

24-Bit, 250 kSPS, Sigma-Delta ADC Settling and True Rail-to-Rail Buffers

文件：1.11819 Mbytes Page：63 Pages

Zero Drift, High Voltage, Low Power, Programmable Gain Instrumentation Amplifier

文件：1.05142 Mbytes Page：59 Pages

24-Bit, 250 kSPS, Sigma-Delta ADC Settling and True Rail-to-Rail Buffers

文件：1.11819 Mbytes Page：63 Pages

24-Bit, 250 kSPS, Sigma-Delta ADC Settling and True Rail-to-Rail Buffers

文件：1.11819 Mbytes Page：63 Pages

24-Bit, 250 kSPS, Sigma-Delta ADC Settling and True Rail-to-Rail Buffers

文件：1.11819 Mbytes Page：63 Pages

24-Bit, 250 kSPS, Sigma-Delta ADC Settling and True Rail-to-Rail Buffers

文件：1.11819 Mbytes Page：63 Pages

32-Bit, 10 kSPS, Sigma-Delta ADC with Settling and True Rail-to-Rail Buffers

文件：988.2 Kbytes Page：61 Pages

32-Bit, 10 kSPS, Sigma-Delta ADC with 100 關s Settling and True Rail-to-Rail Buffers

文件：956.33 Kbytes Page：59 Pages

32-Bit, 10 kSPS, Sigma-Delta ADC with Settling and True Rail-to-Rail Buffers

文件：988.2 Kbytes Page：61 Pages

32-Bit, 10 kSPS, Sigma-Delta ADC with Settling and True Rail-to-Rail Buffers

文件：988.2 Kbytes Page：61 Pages

32-Bit, 10 kSPS, Sigma-Delta ADC with 100 關s Settling and True Rail-to-Rail Buffers

文件：956.33 Kbytes Page：59 Pages

32-Bit, 10 kSPS, Sigma-Delta ADC with 100 關s Settling and True Rail-to-Rail Buffers

文件：956.33 Kbytes Page：59 Pages

32-Bit, 10 kSPS, Sigma-Delta ADC with Settling and True Rail-to-Rail Buffers

文件：988.2 Kbytes Page：61 Pages