丝印代码：ACT1284；7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS

4.5-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 20 ns at 5 V 3-State Outputs Directly Drive Bus Lines Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise ESD Protection Exceeds JESD 22 − 2000-V Hu

丝印代码：ACT1284；7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS

4.5-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 20 ns at 5 V 3-State Outputs Directly Drive Bus Lines Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise ESD Protection Exceeds JESD 22 − 2000-V Hu

丝印代码：ACT1284；7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS

4.5-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 20 ns at 5 V 3-State Outputs Directly Drive Bus Lines Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise ESD Protection Exceeds JESD 22 − 2000-V Hu

丝印代码：ACT1284；7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS

4.5-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 20 ns at 5 V 3-State Outputs Directly Drive Bus Lines Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise ESD Protection Exceeds JESD 22 − 2000-V Hu

丝印代码：ACT1284；7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS

4.5-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 20 ns at 5 V 3-State Outputs Directly Drive Bus Lines Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise ESD Protection Exceeds JESD 22 − 2000-V Hu

丝印代码：ACT1284；7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS

4.5-V to 5.5-V VCC Operation Inputs Accept Voltages to 5.5 V Max tpd of 20 ns at 5 V 3-State Outputs Directly Drive Bus Lines Flow-Through Architecture Optimizes PCB Layout Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise ESD Protection Exceeds JESD 22 − 2000-V Hu

7-BIT BUS INTERFACES WITH 3-STATE OUTPUTS

文件：287.26 Kbytes Page：12 Pages

Power FET (Plastic Package Type)

GENERAL DESCRIPTION The KGF1284, housed in a SOT-89 type plastic-mold package, is a discrete power FET with frequencies ranging from the UHF-to L-band. This device features high efficiency, high output power, and high gain. The KGF1284 specifications are guaranteed to a fixed matching circuit for

PARALLEL PORT SINGLE TERMINATION NETWORK WITH 짹15kV ESD PROTECTION

DESCRIPTION The ST1284-xxA8/T8 is a highly integrated termination for enhanced high speed parallel ports. The integrated termination complies to the IEEE1284 Standard recommendations and government EMC compatibility requirements. It is built around two basic cells. The first one (Cell 1) provid

UHF/VHF TUNER IC (LOW PHASE NOISE OSCILLATOR)

The TA1284FN is TV tuner IC which integrate mixer / oscillator for VHF and CATV bands, mixer / oscillator for UHF band, and IF amplifier on a single chip. Supply voltage of 5 V helps lower power dissipation from the set. Compact 16-pin SSOP makes the tuner more compact. FEATURES Supply

UHF/VHF TUNER IC (LOW PHASE NOISE OSCILLATOR)

The TA1284FN is TV tuner IC which integrate mixer / oscillator for VHF and CATV bands, mixer / oscillator for UHF band, and IF amplifier on a single chip. Supply voltage of 5 V helps lower power dissipation from the set. Compact 16-pin SSOP makes the tuner more compact. FEATURES Supply