ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module

General Description The ACT-D1M96S device is a high-speed 96Mbit synchronous dynamic random access memory (SDRAM) organized as 2 independent 512K X 48 X 2 banks. All inputs and outputs of the ACT-D1M96S are compatible with the LVTTL interface. All inputs and outputs are synchronized with the CLK

ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module

ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module

General Description The ACT-D1M96S device is a high-speed 96Mbit synchronous dynamic random access memory (SDRAM) organized as 2 independent 512K X 48 X 2 banks. All inputs and outputs of the ACT-D1M96S are compatible with the LVTTL interface. All inputs and outputs are synchronized with the CLK

ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module

General Description The ACT-D1M96S device is a high-speed 96Mbit synchronous dynamic random access memory (SDRAM) organized as 2 independent 512K X 48 X 2 banks. All inputs and outputs of the ACT-D1M96S are compatible with the LVTTL interface. All inputs and outputs are synchronized with the CLK

ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module

General Description The ACT-D1M96S device is a high-speed 96Mbit synchronous dynamic random access memory (SDRAM) organized as 2 independent 512K X 48 X 2 banks. All inputs and outputs of the ACT-D1M96S are compatible with the LVTTL interface. All inputs and outputs are synchronized with the CLK

ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module

General Description The ACT-D1M96S device is a high-speed 96Mbit synchronous dynamic random access memory (SDRAM) organized as 2 independent 512K X 48 X 2 banks. All inputs and outputs of the ACT-D1M96S are compatible with the LVTTL interface. All inputs and outputs are synchronized with the CLK

ACT-D1M96S High Speed 96 MegaBit 3.3V Synchronous DRAM Multichip Module

General Description The ACT-D1M96S device is a high-speed 96Mbit synchronous dynamic random access memory (SDRAM) organized as 2 independent 512K X 48 X 2 banks. All inputs and outputs of the ACT-D1M96S are compatible with the LVTTL interface. All inputs and outputs are synchronized with the CLK