丝印代码：AB657A；OCTAL TRANSCEIVERS WITH PARITY GENERATORS/CHECKERS AND 3-STATE OUTPUTS

State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc

丝印代码：AB657A；OCTAL TRANSCEIVERS WITH PARITY GENERATORS/CHECKERS AND 3-STATE OUTPUTS

State-of-the-Art EPIC-IIBE BiCMOS Design Significantly Reduces Power Dissipation ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Typical VOLP (Output Ground Bounc

EPITAXIAL PLANAR NPN TRANSISTOR (SWITCHING, INTERFACE CIRCUIT AND DRIVER CIRCUIT)

SWITCHING APPLICATION. INTERFACE CIRCUIT AND DRIVER CIRCUIT APPLICATION. FEATURES ● With Built-in Bias Resistors. ● Simplify Circuit Design. ● Reduce a Quantity of Parts and Manufacturing Process. ● High Packing Density.

EPITAXIAL PLANAR NPN TRANSISTOR (SWITCHING, INTERFACE CIRCUIT AND DRIVER CIRCUIT)

SWITCHING APPLICATION. INTERFACE CIRCUIT AND DRIVER CIRCUIT APPLICATION. FEATURES ● With Built-in Bias Resistors. ● Simplify Circuit Design. ● Reduce a Quantity of Parts and Manufacturing Process. ● High Packing Density.

1.6GHz, Low-Noise, FET-Input OPERATIONAL AMPLIFIER

文件：390.26 Kbytes Page：20 Pages

1.6GHz, Low-Noise, FET-Input OPERATIONAL AMPLIFIER

文件：390.26 Kbytes Page：20 Pages

POWER INTEGRATED CIRCUIT

文件：222.09 Kbytes Page：4 Pages