DABiC-5 Latched Sink Drivers

DABiC-5 Latched Sink Drivers The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic. The CMOS input section consists of 4 or 8 data (‘D’ type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry. The power outputs are bipolar NPN

DABiC-5 Latched Sink Drivers

Description The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic. The CMOS input section consists of 4 or 8 data (D type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry. The power outputs are bipolar NPN Darlingtons. This

DABiC-5 Latched Sink Drivers

Description The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic. The CMOS input section consists of 4 or 8 data (D type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry. The power outputs are bipolar NPN Darlingtons. This

DABiC - 5锁存灌电流驱动器 (DABiC-5 Latched Sink Drivers)

DABiC-5 Latched Sink Drivers

DABiC-5 Latched Sink Drivers The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic. The CMOS input section consists of 4 or 8 data (‘D’ type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry. The power outputs are bipolar NPN

DABiC-5 Latched Sink Drivers

DABiC-5 Latched Sink Drivers The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic. The CMOS input section consists of 4 or 8 data (‘D’ type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry. The power outputs are bipolar NPN

DABiC-5 Latched Sink Drivers

DABiC-5 Latched Sink Drivers The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic. The CMOS input section consists of 4 or 8 data (‘D’ type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry. The power outputs are bipolar NPN

DABiC-5 Latched Sink Drivers

Description The A6800 and A6801 latched-input BiMOS ICs merge high-current, high-voltage outputs with CMOS logic. The CMOS input section consists of 4 or 8 data (D type) latches with associated common CLEAR, STROBE, and OUTPUT ENABLE circuitry. The power outputs are bipolar NPN Darlingtons. This

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：管件 描述：IC PWR DRIVER BIPOLAR 1:1 14SOIC 集成电路（IC） 配电开关，负载驱动器

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC PWR DRIVER BIPOLAR 1:1 14SOIC 集成电路（IC） 配电开关，负载驱动器

F (M/F) Right Angle, F(M/F), F (F/F) Bulkhead, F (F) PCB

Features • True 75 Ω BNC adapters. • Gold-plated (15 micro–inches) contacts. • BNC insulation material is PTFE (not delrin).

8-BIT MICROPROCESSING UNIT (MPU)

8-BIT MICROPROCESSING UNIT (MPU) The MC6800 is a monolithic 8-bit microprocessor forming the central control function for Motorola’s M68~ family. Compatible with TTL, the MC6B~, as with all M6800 system parts, requires only one + 5.O-volt power supply, and no external TTL devices for bus interf

0.5mmPitch RA SMT Dual-sided contact One- touch lock

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