8K X 8 BIT CMOS SRAM

General Description The A623308 is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Fe

8K X 8 BIT CMOS SRAM

General Description The A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

8K X 8 BIT CMOS SRAM

General Description The A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

8K X 8 BIT CMOS SRAM

General Description\nThe A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V.\nInputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. ■ Power Supply Range: 4.5V to 5.5V\n■ Access times: 70 ns\n   A623308A-S series:\n      Operating: 35mA (max.)\n      Standby: 10µA (max.)\n   A623308A-SI/SU series:\n      Operating: 35mA (max.)\n      Standby: 15µA (max.)\n■ Extended operating temperature range: 0°C to 70°C for -\n   S series, -25;

8K X 8 BIT CMOS SRAM

General Description The A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

8K X 8 BIT CMOS SRAM

General Description The A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

8K X 8 BIT CMOS SRAM

General Description The A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

8K X 8 BIT CMOS SRAM

General Description The A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

8K X 8 BIT CMOS SRAM

General Description The A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

8K X 8 BIT CMOS SRAM

General Description The A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

8K X 8 BIT CMOS SRAM

General Description The A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

8K X 8 BIT CMOS SRAM

General Description The A623308A is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a voltage from 4.5V to 5.5V. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

8K X 8 BIT CMOS SRAM

General Description The A623308 is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Fe

8K X 8 BIT CMOS SRAM

General Description The A623308 is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Fe

8K X 8 BIT CMOS SRAM

General Description The A623308 is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Fe

8K X 8 BIT CMOS SRAM

General Description The A623308 is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Fe

8K X 8 BIT CMOS SRAM

General Description The A623308 is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Fe

8K X 8 BIT CMOS SRAM

General Description The A623308 is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Fe

8K X 8 BIT CMOS SRAM

General Description The A623308 is a low operating current 65,536-bit static random access memory organized as 8,192 words by 8 bits and operates on a single 5V power supply. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. Fe

Low Power SRAM portfolio

Low Power SRAM

8K X 8 BIT CMOS SRAM

文件：194.97 Kbytes Page：14 Pages

IR Receiver Modules for Remote Control Systems

DESCRIPTION The TSOP6... series are miniaturized SMD IR receiver modules for infrared remote control systems. A PIN diode and a preamplifier are assembled on a leadframe, the epoxy package contains an IR filter. The demodulated output signal can be directly connected to a microprocessor for deco

18 to 32 GHz GaAs Low Noise Amplifier

文件：619.24 Kbytes Page：8 Pages

60MHz, Rail-to-Rail Output, 1.9nV / SIGME Hz, 1.15mA Op Amp Family

文件：727.8 Kbytes Page：24 Pages

짹10g Dual Axis Micromachined Accelerometer

文件：277.86 Kbytes Page：11 Pages

10g Dual Axis Micromachined Accelerometer

文件：357.62 Kbytes Page：8 Pages