FOUR OUTPUT DIFFERENTIAL BUFFER FOR PCIE GEN1–3

Description The 9DB433 zero-delay buffer supports PCIe Gen3 requirements, while being backwards compatible to PCIe Gen2 and Gen1. The 9DB433 is driven by a differential SRC output pair from an IDT 932S421 or 932SQ420 or equivalent main clock generator. Features • 3 selectable SMBus addres

4-output 3.3 V PCIe Gen1-2-3 Zero Delay / Fanout Buffer

The 9DB433 zero delay buffer (ZDB) supports PCIe Gen3 requirements while being backward compatible with PCIe Gen2 and Gen1. The 9DB433 is driven by a differential SRC output pair from a 932S421 or 932SQ420 or equivalent main clock generator. • Four 0.7V HCSL differential output pairs\n• Phase jitter: PCIe Gen2 < 3.1ps rms\n• Supports Zero Delay Buffer mode and Fanout mode\n• 33MHz to 110MHz operation in PLL mode\n• 10MHz to 110MHz operation in Bypass mode;

SMBus Interface; unused outputs can be disabled

文件：231.9 Kbytes Page：17 Pages

Spread Spectrum Compatible

文件：231.9 Kbytes Page：17 Pages

封装/外壳：28-SSOP（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC CLK FANOUT/BUFF ZD 28SSOP 集成电路（IC） 应用特定时钟/定时

封装/外壳：28-SSOP（0.209"，5.30mm 宽） 包装：卷带（TR） 描述：IC CLK FANOUT/BUFF ZD 28SSOP 集成电路（IC） 应用特定时钟/定时