1-to-12, Differential HCSL Fanout Buffer

General Description The 8V31012 is a 1-to-12 Differential HCSL Fanout Buffer. The 8V31012 is designed to translate any differential signal levels to differential HCSL output levels. An external reference resistor is used to set the value of the current supplied to an external load/termination

1:4 LVDS Fanout Buffer with 2-Input Multiplexer for 1PPS Applications

General Description The 8V34S204 is a differential 1:4 LVDS fanout buffer with a 2:1 input multiplexer. The device accepts DC to 250MHz clock and data signals and is designed for 1Hz clock /1PPS, 2kHz and 8kHz signal distribution. Controlled by the input mode selection pin, the differential i

1:8 LVDS Fanout Buffer with 2-Input Multiplexer for 1PPS Applications

General Description The 8V34S208 is a differential 1:8 LVDS fanout buffer with a 2:1 input multiplexer. The device accepts DC to 250MHz clock and data signals and is designed for 1Hz clock /1PPS, 2kHz and 8kHz signal distribution. Controlled by the input mode selection pin, the differential i

1-to-12, Differential HCSL Fanout Buffer

文件：455.32 Kbytes Page：17 Pages

1-to-12, Differential HCSL Fanout Buffer

文件：455.32 Kbytes Page：17 Pages

1-to-12, Differential HCSL Fanout Buffer

文件：455.32 Kbytes Page：17 Pages

Four differential LVDS output pairs

文件：728 Kbytes Page：22 Pages

封装/外壳：24-VFQFN 裸露焊盘 包装：托盘 描述：NETWORK TIMING 集成电路（IC） 时钟缓冲器，驱动器

Eight differential LVDS output pairs

文件：662.03 Kbytes Page：21 Pages

封装/外壳：32-VFQFN 裸露焊盘 包装：托盘 描述：NETWORK TIMING 集成电路（IC） 时钟缓冲器，驱动器