丝印代码：ICS8752CYI；LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

FEATURES • Fully integrated PLL • 8 LVCMOS outputs, 7Ω typical output impedance • Selectable LVCMOS CLK0 or CLK1 inputs for redundant clock applications • Input/Output frequency range: 18.33MHz to 240MHz at VCC = 3.3V ± 5 • VCO range: 220MHz to 480MHz • External feedback for “zero delay” c

LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

文件：118.81 Kbytes Page：14 Pages

丝印代码：ICS8752CYILF；LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

FEATURES • Fully integrated PLL • 8 LVCMOS outputs, 7Ω typical output impedance • Selectable LVCMOS CLK0 or CLK1 inputs for redundant clock applications • Input/Output frequency range: 18.33MHz to 240MHz at VCC = 3.3V ± 5 • VCO range: 220MHz to 480MHz • External feedback for “zero delay” c

丝印代码：ICS8752CYILF；LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

FEATURES • Fully integrated PLL • 8 LVCMOS outputs, 7Ω typical output impedance • Selectable LVCMOS CLK0 or CLK1 inputs for redundant clock applications • Input/Output frequency range: 18.33MHz to 240MHz at VCC = 3.3V ± 5 • VCO range: 220MHz to 480MHz • External feedback for “zero delay” c

丝印代码：ICS8752CYI；LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

FEATURES • Fully integrated PLL • 8 LVCMOS outputs, 7Ω typical output impedance • Selectable LVCMOS CLK0 or CLK1 inputs for redundant clock applications • Input/Output frequency range: 18.33MHz to 240MHz at VCC = 3.3V ± 5 • VCO range: 220MHz to 480MHz • External feedback for “zero delay” c

LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

文件：118.81 Kbytes Page：14 Pages

LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

文件：118.81 Kbytes Page：14 Pages

封装/外壳：32-LQFP 包装：卷带（TR） 描述：IC CLK MULT/ZD BUFFER 32-LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器

LOW SKEW, 1-TO-8 LVCMOS CLOCK MULTIPLIER/ZERO DELAY BUFFER

文件：118.81 Kbytes Page：14 Pages

MCS51 8-BIT CONTROL-ORIENTED MICROCONTROLLERS

The MCS@51 controllers are optimized for control applications. Byte-processing and numerical operations on small data structures are facilitated by a variety of fast addressing modes for accessing the internal RAM. The instruction set provides a convenient menu of 8-bit arithmetic instructions, in

Triple high-speed Analog-to-Digital Converter ADC

文件：209.26 Kbytes Page：36 Pages

Triple high-speed Analog-to-Digital Converter 110 Msps ADC

文件：154.66 Kbytes Page：36 Pages

Triple high-speed Analog-to-Digital Converter 110 Msps ADC

文件：154.66 Kbytes Page：36 Pages

Triple high speed Analog-to-Digital Converter ADC

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