丝印代码：ICS8745BYILF；1:5 Differential-to-LVDS Zero Delay Clock Generator

Features • Five differential LVDS outputs designed to meet or exceed the requirements of ANSI TIA/EIA-644 • Selectable differential clock inputs • CLKx, nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Output frequency range: 31.25MHz to 700M

封装/外壳：32-LQFP 包装：卷带（TR） 描述：IC CLK GEN 1:5 DIFF-LVDS 32-LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器

IC CLK GEN 1:5 DIFF-LVDS 32-LQFP

1:5 Differential-to-LVDS Zero Delay Clock Generator

文件：814.38 Kbytes Page：20 Pages

TOSHIBA SILICON TRANSISTOR

TA8745EN DIP 54 Pin

POWER ZENERS

DESCRIPTION One watt zener diodes, hermetically sealed in glass. FEATURES • High Surge Ratings • A Quarter the Size of Conventional 1Watt Zeners • Impervious to Moisture

1:5 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR

文件：192.34 Kbytes Page：15 Pages

1:5 DIFFERENTIAL-TO-LVDS ZERO DELAY CLOCK GENERATOR

文件：192.34 Kbytes Page：15 Pages

Satellite sound receiver with I2C-bus control

文件：261.089 Kbytes Page：40 Pages