1:5, Differential-to-3.3V LVPECL Zero Delay Clock Generator

Features • Five differential 3.3V LVPECL output pairs • Selectable differential clock inputs • CLKx/nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL • Output frequency range: 15.625MHz to 350MHz • Input frequency range: 15.625MHz to 350MHz • V

1:5, Differential-to-3.3V LVPECL Zero Delay Clock Generator

The 8735-31 is a highly versatile 1:5 Differential -to-3.3V LVPECL Clock Generator. The 8735-31 has a fully integrated PLL and can be configured as zero delay buffer, multiplier or divider, and has an output frequency range of 15.625MHz to 350MHz. The reference divider, feedback divider and output d ·Five differential 3.3V LVPECL output pairs\n·Selectable differential clock inputs\n·CLKx/nCLKx pairs can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL\n·Output frequency range: 15.625MHz to 350MHz\n·Input frequency range: 15.625MHz to 350MHz\n·VCO range: 250MHz to;

Selectable differential clock inputs

文件：350.76 Kbytes Page：21 Pages

1:5, Differential-to-3.3V LVPECL Zero Delay Clock Generator

文件：424.09 Kbytes Page：21 Pages

1:5, Differential-to-3.3V LVPECL Zero Delay Clock Generator

文件：424.09 Kbytes Page：21 Pages

包装：散装 描述：HANDLE ALUMINUM MTG CTR 7\ 盒子，外壳，机架 手柄

包装：散装 描述：HANDLE BRASS MTG CTR 7\ 盒子，外壳，机架 手柄