丝印代码：ICS8731CY01L；Low SKEW, 1-to-11 Differential-to-3.3V LVPECL Clock Multiplier / Zero Delay Buffer

FEATURES • Eleven differential 3.3V LVPECL outputs • Differential reference clock input pair • REF_CLK, nREF_CLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Maximum reference clock input frequency: 200MHz • V

封装/外壳：48-LQFP 包装：卷带（TR） 描述：IC CLOCK ULT/ZD BUFFER 48-LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器

丝印代码：ICS8731CY01L；Low SKEW, 1-to-11 Differential-to-3.3V LVPECL Clock Multiplier / Zero Delay Buffer

FEATURES • Eleven differential 3.3V LVPECL outputs • Differential reference clock input pair • REF_CLK, nREF_CLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum output frequency: 700MHz • Maximum reference clock input frequency: 200MHz • V

封装/外壳：48-LQFP 包装：卷带（TR） 描述：IC CLOCK ULT/ZD BUFFER 48-LQFP 集成电路（IC） 时钟发生器，PLL，频率合成器