LVCMOS/LVTTL Clock Divider

The ICS87001-01 is a low skew, ÷1, ÷2, ÷3, ÷4, ÷5, ÷6, ÷8, ÷16 LVCMOS/LVTTL Fanout Buffer/Divider. The ICS87001-01 has selectable clock inputs that accept single ended input levels. Output enable pin controls whether the output is in the active or high impedance state. The ICS87001-01 is characteriz ·One LVCMOS / LVTTL output\n·Selectable LVCMOS / LVTTL clock inputs\n·Maximum output frequency: 250MHz\n·Part-to-part skew: 135ps (typical)\n·Power supply modes:Core/Output3.3V/3.3V3.3V/2.5V3.3V/1.8V2.5V/2.5V2.5V/1.8V\n·0°C to 70°C ambient operating temperature\n·Lead-free (RoHS 6) packaging;

LVCMOS/LVTTL Clock Divider

General Description The ICS87001-01 is a low skew, ÷1, ÷2, ÷3, ÷4, ÷5, ÷6, ÷8, ÷16 LVCMOS/LVTTL Fanout Buffer/Divider. The ICS87001-01 has selectable clock inputs that accept single ended input levels. Output enable pin controls whether the output is in the active or high impedance state. Th

LVCMOS/LVTTL CLOCK DIVIDER

文件：717.98 Kbytes Page：12 Pages