Low Skew, 1-to-4 LVCMOS/LVTTL-to-LVDS Fanout Buffer

Features • Four differential LVDS output pairs • Two LVCMOS/LVTTL clock inputs to support redundant or selectable frequency fanout applications • Maximum output frequency: 650MHz • Translates LVCMOS/LVTTL input signals to LVDS levels • Output skew: 40ps (maximum) • Part-to-part skew: 500ps

Low Skew,1-to-4 LVCMOS/LVTTL-to-LVDS Fanout Buffer

LVCMOS/LVTTL-to-LVDS Fanout Buffer

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