Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

Features • Four differential LVDS output pairs • Selectable differential CLK/nCLK or LVPECL clock inputs • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • PCLK/nPCLK pair can accept the following differential input levels: LVPECL, CML, SST

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC CLK BUFFER 2:4 650MHZ 20TSSOP 集成电路（IC） 时钟缓冲器，驱动器

INDUCTORS Inductors Designed for Nationals 150 KHz SIMPLE SWITCHERTM

文件：100.28 Kbytes Page：1 Pages

AXL E EC DI8 DO4 2A M12 6P

文件：333.82 Kbytes Page：25 Pages

Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

Features • Four differential LVDS output pairs • Selectable differential CLK/nCLK or LVPECL clock inputs • CLK/nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • PCLK/nPCLK pair can accept the following differential input levels: LVPECL, CML, SST

20V P-Channel Power MOSFET

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