Low Skew,1-to-4,Differential-to-LVDS Fanout Buffer

The 854104 is a low skew, high performance 1-to-4 Differential-to-LVDS Clock Fanout Buffer and a member of the HiPerClockS™ family of High Performance Clock Solutions from IDT. Utilizing Low Voltage Differential Signaling (LVDS), the 854104 provides a low power, low noise, solution for distributing • Four differential LVDS output pairs\n• One differential clock input pair\n• CLK/nCLK can accept the following differential input levels: LVPECL, LVDS, LVHSTL, HCSL, SSTL\n• Each output has an individual OE control\n• Maximum output frequency: 700MHz\n• Translates differential input signals to LVDS;

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 包装：托盘 描述：IC CLK BUFFER 1:4 700MHZ 16TSSOP 集成电路（IC） 时钟缓冲器，驱动器

丝印代码：54104AIL；Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

文件：321.31 Kbytes Page：15 Pages

丝印代码：54104AIL；Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

文件：321.31 Kbytes Page：15 Pages

封装/外壳：16-TSSOP（0.173"，4.40mm 宽） 包装：托盘 描述：IC CLK BUFFER 1:4 700MHZ 16TSSOP 集成电路（IC） 时钟缓冲器，驱动器

Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

General Description The ICS854104 is a low skew, high performance 1-to-4 Differential-to-LVDS Clock Fanout Buffer. Utilizing Low Voltage Differential Signaling (LVDS), the ICS854104 provides a low power, low noise, solution for distributing clock signals over controlled impedances of 100. Th

Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

文件：750.8 Kbytes Page：15 Pages

Low Skew, 1-to-4, Differential-to-LVDS Fanout Buffer

文件：321.31 Kbytes Page：15 Pages