Low Skew, 1-to-8 Differential/LVCMOS-to- LVCMOS Fanout Buffer

FEATURES • Eight LVCMOS/LVTTL outputs, (7Ω typical output impedance) • Selectable LVCMOS_CLK or differential CLK, nCLK inputs • CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL • Maximum Output Frequency: 350MHz • Output Skew: (3.3V± 5): 100

Low Skew,1-to-8 Differential/LVCMOS-to-LVCMOS Fanout Buffer

The 8308I is a low-skew, 1-to-8 Fanout Buffer. The 8308I has two selectable clock inputs. The CLK, nCLK pair can accept most differential input levels. The LVCMOS_CLK can accept LVCMOS or LVTTL input levels. The low impedance LVCMOS/ LVTTL outputs are designed to drive 50? series or parallel termina • Eight LVCMOS/LVTTL outputs, (7Ω typical output impedance)\n• Selectable LVCMOS_CLK or differential CLK, nCLK inputs\n• CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL\n• Maximum Output Frequency: 350MHz\n• Output Skew: (3.3V± 5%): 100ps (maxi;

8:1, Single-Ended Multiplexer

文件：169.45 Kbytes Page：14 Pages

Connector Modules with Intergrated LAN Magnetics

[FILTRAN] • Unique layout conserves precious circuit board space • Designed for HUB applications • IEEE 802.3u • Compliant with a wide assortment of ICs • Primary center taps available for additional EMI reduction

Dual P-Channel, Logic Level, PowerTrenchTM MOSFET

General Description The SuperSOT-8 family of P-Channel Logic Level MOSFETs have been designed to provide a low profile, small footprint alternative to industry standard SO-8 little foot type product. Features ■ -3.2 A, -20 V. RDS(ON) = 0.050 Ω @ VGS = -4.5 V, RDS(ON) = 0.070 Ω @ VGS = -2.5 V.

8-Bit TRI-STATE Bidirectional Transceiver (Non-Inverting)

文件：128.389 Kbytes Page：6 Pages

8-Bit TRI-STATE Bidirectional Transceiver (Non-Inverting)

文件：128.389 Kbytes Page：6 Pages

REALTEK SINGLE CHIP 8-PORT 10/100 ETHERNET SWITCH CONTROLLER WITH EMBEDDED MEMORY

文件：397.29 Kbytes Page：28 Pages