HEX SCHMITT INVERTER

DESCRIPTION The 74VHC14 is an advanced high-speed CMOS HEX SCHMITT INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. ■ HIGH S

HEX SCHMITT INVERTER

DESCRIPTION The 74VHC14 is an advanced high-speed CMOS HEX SCHMITT INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. ■ HIGH S

Hex Schmitt Inverter

General Description The VHC14 is an advanced high speed CMOS Hex Schmitt Inverter fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. Pin configuration and function are the

Hex Schmitt Inverter

HEX SCHMITT inverter

Description The 74VHC14 is an advanced high-speed CMOS HEX SCHMITT inverter fabricated with submicron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. Power dow

Hex Schmitt Inverter

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HEX SCHMITT INVERTER

DESCRIPTION The 74VHC14 is an advanced high-speed CMOS HEX SCHMITT INVERTER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. ■ HIGH S

Hex Schmitt inverter

Features ■ High speed: tPD = 5.5 ns (typ.) at VCC = 5 V ■ Low power dissipation – ICC = 2 μA (max.) at TA = 25 °C ■ Typical hysteresis: Vh = 1 V at VCC = 4.5 V ■ Power-down protection on inputs – Symmetrical output impedance |IOH| = IOL = 8 mA (min.) ■ Balanced propagation delay: tPLH ≅ tP

HEX SCHMITT inverter

Description The 74VHC14 is an advanced high-speed CMOS HEX SCHMITT inverter fabricated with submicron silicon gate and double-layer metal wiring C2MOS technology. The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output. Power dow

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：卷带（TR） 描述：IC INVERTER 6CH 1-INP 14TSSOP 集成电路（IC） 门和反相器