Single buffer

文件：753.32 Kbytes Page：14 Pages

Single buffer

1. General description The 74LVC1G16-Q100 provides a low-power, low-voltage single buffer. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applicatio

Single buffer

1. General description The 74LVC1G16-Q100 provides a low-power, low-voltage single buffer. The input can be driven from either 3.3 V or 5 V devices. This feature allows the use of this device in a mixed 3.3 V and 5 V environment. This device is fully specified for partial power-down applicatio

Single buffer

文件：753.32 Kbytes Page：14 Pages

Single buffer

文件：753.32 Kbytes Page：14 Pages

Single buffer

封装/外壳：6-XFDFN 包装：卷带（TR） 描述：IC BUFFER NON-INVERT 5.5V 6XSON 集成电路（IC） 缓冲器，驱动器，接收器，收发器

Single buffer

文件：753.32 Kbytes Page：14 Pages

Single buffer

封装/外壳：5-TSSOP，SC-70-5，SOT-353 包装：管件 描述：IC BUFFER NON-INVERT 5.5V 5TSSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

Single buffer

SN74LVC1G16 Inverting Buffer with Schmitt-Trigger Input and Open-Drain Output

1 Features • Operating range from 1.1V to 5.5V • 5.5V tolerant input pins • Supports standard pinouts • Latch-up performance exceeds 100mA per JESD 17 2 Applications • Combining power good signals • Enable digital signals 3 Description This device is an Inverter Buffer with a Schmitt