Quad buffer/line driver with 5 V tolerant input/outputs; 3-state

Quad buffer/line driver with 5 V tolerant input/outputs; 3-state

1. General description The 74LVC125A is a quad buffer/line driver with 3-state outputs controlled by the output enable inputs (nOE). A HIGH on nOE causes the outputs to assume a high impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these

Quad buffer/line driver; 3-State

The 74LVC125 is a high performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families.

Quad buffer/line driver with 5 V tolerant input/outputs; 3-state

General description The 74LVC125A-Q100 consists of four non-inverting buffers/line drivers with 3-state outputs (nY) that are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices.

封装/外壳：14-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BUF NON-INVERT 3.6V 14DHVQFN 集成电路（IC） 缓冲器，驱动器，接收器，收发器

封装/外壳：14-VFQFN 裸露焊盘 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC BUF NON-INVERT 3.6V 14DHVQFN 集成电路（IC） 缓冲器，驱动器，接收器，收发器

Low-Voltage CMOS Quad 2-Input XOR Gate

Low-Voltage CMOS Quad Buffer With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting) The 74LVC125A is a high performance, non−inverting quad buffer operating from a 1.2 to 3.6 V supply. High impedance TTL compatible inputs significantly reduce current loading to input drivers while TTL com

Quad buffer/line driver with 5-volt tolerant inputs/outputs 3-State

DESCRIPTION The 74LVC125A is a high performance, low-power, low-voltage Si-gate CMOS device and superior to most advanced CMOS compatible TTL families. FEATURES • 5-volt tolerant inputs/outputs, for interfacing with 5-volt logic • Supply voltage range of 1.2V to 3.6V • Complies with JEDEC sta

LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE) HIGH PERFORMANCE

DESCRIPTION The 74LVC125A is a low voltage CMOS QUAD BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for 1.65 to 3.6 VCC operations and low power and low noise applications. ■ 5V TOLERANT INPUTS ■ HIGH SPEED: tPD = 4.8ns (MAX.) at V

LOW VOLTAGE CMOS QUAD BUS BUFFERS (3-STATE) HIGH PERFORMANCE

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