74LV138D价格
参考价格:¥1.1846
型号:74LV138D,112 品牌:NXP 备注:这里有74LV138D多少钱,2026年最近7天走势,今日出价,今日竞价,74LV138D批发/采购报价,74LV138D行情走势销售排行榜,74LV138D报价。| 型号 | 功能描述 | 生产厂家 企业 | LOGO | 操作 |
|---|---|---|---|---|
74LV138D | 3-to-8 line decoder/demultiplexer; inverting | ETC 知名厂家 | ETC | |
74LV138D | 3-to-8 line decoder/multiplexer; inverting DESCRIPTION The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). FEATURES • Wide operatin | PHILIPS 飞利浦 | ||
74LV138D | 3-to-8 line decoder/demultiplexer; inverting 1. General description The 74LV138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LVC138A features three enable inputs (Y1, Y2 and E3). Every output will be HIGH unless Y1 and Y2 are LOW and E3 is HIGH. This multiple enable fun | NEXPERIA 安世 | ||
74LV138D | 3-to-8 line decoder/demultplexer; inverting The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC138 and 74HCT138.\n The 74LV138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive active LOW out • Wide operating voltage: 1.0 V to 5.5 V\n• Optimized for low voltage applications: 1.0 V to 3.6 V\n• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V\n• Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C\n• Typical HIGH-level output voltage (VOH) undershoot: > 2 V at V; | NEXPERIA 安世 | ||
3-to-8 line decoder/demultiplexer; inverting | ETC 知名厂家 | ETC | ||
3-to-8 line decoder/demultplexer; inverting The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC138 and 74HCT138.\n The 74LV138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive active LOW out • Wide operating voltage: 1.0 V to 5.5 V\n• Optimized for low voltage applications: 1.0 V to 3.6 V\n• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V\n• Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C\n• Typical HIGH-level output voltage (VOH) undershoot: > 2 V at V; | NEXPERIA 安世 | |||
3-to-8 line decoder/multiplexer; inverting DESCRIPTION The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). FEATURES • Wide operatin | PHILIPS 飞利浦 | |||
3-to-8 line decoder/demultiplexer; inverting The 74LV138-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LV138-Q100 features three enable inputs (Y1, Y2 and E3). Every output will be HIGH unless Y1 and Y2 are LOW and E3 is HIGH. This multiple enable function allows easy pa | NEXPERIA 安世 | |||
封装/外壳:16-SOIC(0.154",3.90mm 宽) 包装:卷带(TR) 描述:IC DECODER/DEMUX 1 X 3:8 16SO 集成电路(IC) 信号开关,多路复用器,解码器 | ETC 知名厂家 | ETC | ||
封装/外壳:16-SSOP(0.209",5.30mm 宽) 包装:管件 描述:IC DECODER/DEMUX 1X3:8 16SSOP 集成电路(IC) 信号开关,多路复用器,解码器 | ETC 知名厂家 | ETC | ||
3-to-8 line decoder/multiplexer; inverting DESCRIPTION The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). FEATURES • Wide operatin | PHILIPS 飞利浦 | |||
3-to-8 line decoder/multiplexer; inverting DESCRIPTION The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). FEATURES • Wide operatin | PHILIPS 飞利浦 | |||
3-to-8 line decoder/multiplexer; inverting DESCRIPTION The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). FEATURES • Wide operatin | PHILIPS 飞利浦 | |||
3-to-8 line decoder/multiplexer; inverting DESCRIPTION The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). FEATURES • Wide operatin | PHILIPS 飞利浦 |
74LV138D产品属性
- 类型
描述
- VCC (V):
1.0 - 5.5
- Logic switching levels:
TTL
- Output drive capability (mA):
± 12
- tpd (ns):
12
- Power dissipation considerations:
low
- Tamb (°C):
-40~125
- Rth(j-a) (K/W):
81
- Ψth(j-top) (K/W):
4.5
- Rth(j-c) (K/W):
39.5
- Package name:
SO16
| IC供应商 | 芯片型号 | 品牌 | 批号 | 封装 | 库存 | 备注 | 价格 |
|---|---|---|---|---|---|---|---|
Nexperia USA Inc. |
24+25+ |
16500 |
全新原厂原装现货!受权代理!可送样可提供技术支持! |
||||
NEXPERIA/安世 |
21+ |
NA |
12500 |
只做原装,一定有货,不止网上数量,量多可订货! |
|||
Nexperia(安世) |
25+ |
SSOP16208mil |
2245 |
原装现货,免费供样,技术支持,原厂对接 |
|||
恩XP |
24+ |
SOP-16 |
80000 |
只做自己库存 全新原装进口正品假一赔百 可开13%增 |
|||
NEXPERIA/安世 |
25+ |
原装 |
600000 |
NEXPERIA/安世全新特价74LV138D,118即刻询购立享优惠#长期有排单订 |
|||
恩XP |
21+ |
6000 |
只做原装正品,卖元器件不赚钱交个朋友 |
||||
恩XP |
1610+ |
SOP-16 |
4961 |
一级代理,专注军工、汽车、医疗、工业、新能源、电力 |
|||
恩XP |
24+ |
N/A |
16000 |
原装正品现货支持实单 |
|||
恩XP |
2223+ |
SSOP |
26800 |
只做原装正品假一赔十为客户做到零风险 |
|||
恩XP |
24+ |
N/A |
25843 |
公司原厂原装现货假一罚十!特价出售!强势库存! |
74LV138D规格书下载地址
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74LV138D数据表相关新闻
74LS26
www.jskj-ic.com
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2021-4-2974LV4051PW TSSOP-16 NXP/恩智浦 模拟开关IC 原装正品 自家现货
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2012-11-9
DdatasheetPDF页码索引
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