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位置：首页 > IC中文资料 > 74LV138

74LV138价格

参考价格：￥1.0478

型号：74LV138BQ,115 品牌：NXP 备注：这里有74LV138多少钱，2026年最近7天走势，今日出价，今日竞价，74LV138批发/采购报价，74LV138行情走势销售排行榜，74LV138报价。
型号 功能描述 生产厂家 企业 LOGO 操作
74LV138

3-to-8 line decoder/multiplexer; inverting

DESCRIPTION The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). FEATURES • Wide operatin

PHILIPS

飞利浦

74LV138

3-to-8 line decoder/demultiplexer; inverting

ETC

知名厂家

74LV138

3-to-8 line decoder/demultiplexer; inverting

1. General description The 74LV138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LVC138A features three enable inputs (Y1, Y2 and E3). Every output will be HIGH unless Y1 and Y2 are LOW and E3 is HIGH. This multiple enable fun

NEXPERIA

安世

SN74LV138ANSR

丝印代码：74LV138A；3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

FEATURES · 2-V to 5.5-V VCC Operation · Max t pd of 9.5 ns at 5 V · Typical VOLP (Output Ground Bounce) 2.3 V at VCC = 3.3 V, TA = 25°C · Support Mixed-Mode Voltage Operation on All Ports · Ioff Supports Partial-Pow

TI

德州仪器

74LV138BQ

3-to-8 line decoder/demultiplexer; inverting

1. General description The 74LV138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LVC138A features three enable inputs (Y1, Y2 and E3). Every output will be HIGH unless Y1 and Y2 are LOW and E3 is HIGH. This multiple enable fun

NEXPERIA

安世

74LV138BQ

3-to-8 line decoder/demultiplexer; inverting

ETC

知名厂家

74LV138D

3-to-8 line decoder/multiplexer; inverting

DESCRIPTION The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). FEATURES • Wide operatin

PHILIPS

飞利浦

74LV138D

3-to-8 line decoder/demultiplexer; inverting

1. General description The 74LV138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LVC138A features three enable inputs (Y1, Y2 and E3). Every output will be HIGH unless Y1 and Y2 are LOW and E3 is HIGH. This multiple enable fun

NEXPERIA

安世

74LV138D

3-to-8 line decoder/demultiplexer; inverting

ETC

知名厂家

74LV138D

3-to-8 line decoder/demultplexer; inverting

The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC138 and 74HCT138.\n The 74LV138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive active LOW out • Wide operating voltage: 1.0 V to 5.5 V\n• Optimized for low voltage applications: 1.0 V to 3.6 V\n• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V\n• Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C\n• Typical HIGH-level output voltage (VOH) undershoot: > 2 V at V;

NEXPERIA

安世

74LV138DB

3-to-8 line decoder/demultplexer; inverting

The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC138 and 74HCT138.\n The 74LV138 is a 3-to-8 line decoder/demultiplexer. It accepts three binary weighted address inputs (A0, A1 and A2) and, when enabled, provides eight mutually exclusive active LOW out • Wide operating voltage: 1.0 V to 5.5 V\n• Optimized for low voltage applications: 1.0 V to 3.6 V\n• Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V\n• Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C\n• Typical HIGH-level output voltage (VOH) undershoot: > 2 V at V;

NEXPERIA

安世

74LV138DB

3-to-8 line decoder/demultiplexer; inverting

ETC

知名厂家

74LV138DB

3-to-8 line decoder/multiplexer; inverting

DESCRIPTION The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). FEATURES • Wide operatin

PHILIPS

飞利浦

74LV138D-Q100

3-to-8 line decoder/demultiplexer; inverting

The 74LV138-Q100 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LV138-Q100 features three enable inputs (Y1, Y2 and E3). Every output will be HIGH unless Y1 and Y2 are LOW and E3 is HIGH. This multiple enable function allows easy pa

NEXPERIA

安世

74LV138N

3-to-8 line decoder/multiplexer; inverting

DESCRIPTION The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). FEATURES • Wide operatin

PHILIPS

飞利浦

74LV138N

3-to-8 line decoder/demultiplexer; inverting

ETC

知名厂家

74LV138PW

3-to-8 line decoder/demultiplexer; inverting

1. General description The 74LV138 decodes three binary weighted address inputs (A0, A1 and A2) to eight mutually exclusive outputs (Y0 to Y7). The 74LVC138A features three enable inputs (Y1, Y2 and E3). Every output will be HIGH unless Y1 and Y2 are LOW and E3 is HIGH. This multiple enable fun

NEXPERIA

安世

74LV138PW

3-to-8 line decoder/multiplexer; inverting

DESCRIPTION The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). FEATURES • Wide operatin

PHILIPS

飞利浦

74LV138PW

3-to-8 line decoder/demultiplexer; inverting

ETC

知名厂家

74LV138PWDH

3-to-8 line decoder/multiplexer; inverting

DESCRIPTION The 74LV138 is a low-voltage Si-gate CMOS device that is pin and function compatible with 74HC/HCT138. The 74LV138 accepts three binary weighted address inputs (A0, A1, A2) and when enabled, provide 8 mutually exclusive active LOW outputs (Y0 to Y7). FEATURES • Wide operatin

PHILIPS

飞利浦

74LV138_15

3-to-8 line decoder/demultiplexer; inverting

文件：113.24 Kbytes Page：17 Pages

PHILIPS

飞利浦

74LV138A

3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS

文件：649.05 Kbytes Page：18 Pages

TI

德州仪器

74LV138D,112

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC DECODER/DEMUX 1 X 3:8 16SO 集成电路（IC） 信号开关，多路复用器，解码器

ETC

知名厂家

74LV138D,118

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC DECODER/DEMUX 1 X 3:8 16SO 集成电路（IC） 信号开关，多路复用器，解码器

ETC

知名厂家

74LV138产品属性

  • 类型

    描述

  • VCC (V)：

    1.0 - 5.5

  • Logic switching levels：

    TTL

  • Output drive capability (mA)：

    ± 12

  • tpd (ns)：

    12

  • Power dissipation considerations：

    low

  • Tamb (°C)：

    -40~125

  • Rth(j-a) (K/W)：

    83

  • Ψth(j-top) (K/W)：

    6.5

  • Rth(j-c) (K/W)：

    50

  • Package name：

    DHVQFN16

74LV138供应商更多...

更新时间：2026-5-15 17:11:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
深圳市美思瑞电子科技有限公司
74LV138D,112
NEXPERIA/安世
22+
N/A
12245
现货,原厂原装假一罚十!
询价
深圳市腾亿芯科技有限公司
74LV138D118
NEXPERIA/安世
25+
NA
20000
原装
询价
深圳市华康联电子科技有限公司
74LV138D
Nexperia
25+
N/A
20000
询价
深圳市科恒伟业电子有限公司
74LV138PW
恩XP
2450+
SOP-8
6540
只做原装正品假一赔十为客户做到零风险!!
询价
深圳市明嘉莱科技有限公司
74LV138APWR
PHI
0242+
明嘉莱只做原装正品现货
2510000
TSSOP
询价
深圳市华斯顿科技有限公司
74LV138N
恩XP
25+23+
DIP16
6880
绝对原装正品全新进口深圳现货
询价
深圳市昌和盛利电子有限公司
74LV138DB
PHI
26+
SSOP
12300
代理全系列销售,全新原装正品,价格优势,长期供应,量大可订
询价
深圳市芯球通科技有限公司
74LV138D
恩XP
23+
9865
原装正品,假一赔十
询价
深圳市福田区绿盛电子商行
74LV138D112
恩XP
2018+
26976
代理原装现货/特价热卖!
询价
深圳市福安瓯科技有限公司
74LV138
PHI
25+
TSSOP16
9531
⊙⊙新加坡大量现货库存,深圳常备现货!欢迎查询!⊙
询价

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