Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

General Description The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX126 is fabricated w

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

General Description The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX126 is fabricated w

带 5V 耐压输入和输出的低压四路缓冲器

LCX126包含四个带3态输出的独立同相缓冲器。 每个输出在相关输出使能(OE)输入为低电平时被禁用。 输入容许电压达7V，允许5V系统到3V系统的连接。 74LCX126采用先进的CMOS技术制造，以在实现高速运行的同时保持CMOS低功耗。 •5V容差输入和输出\n•提供2.3V-3.6V VCC规格\n•5.5 ns tPD最大值(VCC = 3.3V)，10 µA ICC最大值\n•掉电高阻抗输入和输出\n•支持带电插/拔（注1）\n•±24 mA输出驱动(VCC = 3.0V)\n•实施专利噪声/电磁干扰(EMI)消减电路\n•闩锁性能超越JEDEC 78条件\n•ESD性能：人体模型> 2000V 机器模型> 100V\n•无引线无铅DQFN封装;

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：530.39 Kbytes Page：11 Pages

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：759.47 Kbytes Page：13 Pages

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

General Description The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX126 is fabricated w

74LCX low voltage CMOS logic IC series

Function：Quad Bus Buffer (3-State)\nNumber of Circuits：4\nRoHS Compatible Product(s) (#)：Available\nAssembly bases：日本

丝印代码：LCX126；CMOS Digital Integrated Circuits Silicon Monolithic

Functional Description • Low-Voltage Quad Bus Buffer with 5-V Tolerant Inputs and Outputs General The 74LCX126FT is a high-performance CMOS quad bus buffers. Designed for use in 3.3 V systems, it achieves high-speed operation while maintaining the CMOS low power dissipation. The device is d

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

General Description The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX126 is fabricated w

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

General Description The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX126 is fabricated w

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

General Description The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX126 is fabricated w

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

General Description The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX126 is fabricated w

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

General Description The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX126 is fabricated w

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

General Description The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems. The 74LCX126 is fabricated w

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：530.39 Kbytes Page：11 Pages

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：759.47 Kbytes Page：13 Pages

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：759.47 Kbytes Page：13 Pages

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：530.39 Kbytes Page：11 Pages

封装/外壳：14-TSSOP（0.173"，4.40mm 宽） 包装：管件 描述：IC BUF NON-INVERT 3.6V 14TSSOP 集成电路（IC） 缓冲器，驱动器，接收器，收发器

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR） 描述：IC BUF NON-INVERT 3.6V 14SOIC 集成电路（IC） 缓冲器，驱动器，接收器，收发器

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：530.39 Kbytes Page：11 Pages

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：759.47 Kbytes Page：13 Pages

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：530.39 Kbytes Page：11 Pages

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：759.47 Kbytes Page：13 Pages

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：530.39 Kbytes Page：11 Pages

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：530.39 Kbytes Page：11 Pages

Low Voltage Quad Buffer with 5V Tolerant Inputs and Outputs

文件：759.47 Kbytes Page：13 Pages