General Description

The LCX126 contains four independent non-inverting buffers with 3-STATE outputs. Each output is disabled when the associated output-enable (OE) input is LOW. The inputs tolerate voltages up to 7V allowing the interface of 5V systems to 3V systems.

The 74LCX126 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

Features

■ 5V tolerant inputs and outputs

■ 2.3V–3.6V VCC specifications provided

■ 5.5ns tPD max. (VCC = 3.3V), 10µA ICC max.

■ Power down high impedance inputs and outputs

■ Supports live insertion/withdrawal(1)

■ ±24mA output drive (VCC = 3.0V)

■ Implements proprietary noise/EMI reduction circuitry

■ Latch-up performance exceeds JEDEC 78 conditions

■ ESD performance:

– Human body model > 2000V

– Machine model > 100V

■ Leadless DQFN package