8-bit serial-in, parallel-out shift register

8-bit serial-in, parallel-out shift register

8-bit serial-in, parallel-out shift register

General description The 74HC164; 74HCT164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data

8-bit serial-in, parallel-out shift register

The 74HC164; 74HCT164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the othe • Input levels:• For 74HC164: CMOS level\n• For 74HCT164: TTL level\n\n• Gated serial data inputs\n• Asynchronous master reset\n• Complies with JEDEC standard no. 7A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package options\n• Specified from ;

8-bit serial-in, parallel-out shift register

文件：131.91 Kbytes Page：24 Pages

8-bit serial-in, parallel-out shift register

8-bit serial-in, parallel-out shift register

8-bit serial-in, parallel-out shift register

General description The 74HC164; 74HCT164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data

8-bit serial-in, parallel-out shift register

The 74HC164; 74HCT164 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry through the othe • Input levels:• For 74HC164: CMOS level\n• For 74HCT164: TTL level\n\n• Gated serial data inputs\n• Asynchronous master reset\n• Complies with JEDEC standard no. 7A\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package options\n• Specified from ;

8-bit serial-in, parallel-out shift register

General description The 74HC164-Q100; 74HCT164-Q100 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enabl

8-bit serial-in, parallel-out shift register

1. General description The 74HC164-Q100; 74HCT164-Q100 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH

8-bit serial-in, parallel-out shift register

The 74HC164-Q100; 74HCT164-Q100 is an 8-bit serial-in/parallel-out shift register. The device features two serial data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through DSA or DSB and either input can be used as an active HIGH enable for data entry throug • Automotive product qualification in accordance with AEC-Q100 (Grade 1):• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Input levels:• For 74HC164-Q100: CMOS level\n• For 74HCT164-Q100: TTL level\n\n• Gated serial data inputs\n• Asynchronous master reset\n• Complies with JEDEC sta;

封装/外壳：14-SOIC（0.154"，3.90mm 宽） 功能：串行至并行 包装：管件 描述：IC SHIFT REG 8BIT SI-PO 14SOIC 集成电路（IC） 移位寄存器

封装/外壳：14-DIP（0.300"，7.62mm） 功能：串行至并行 包装：卷带（TR） 描述：LOGIC HCT STD DIP-14 集成电路（IC） 移位寄存器

8-bit serial-in, parallel-out shift register

文件：131.91 Kbytes Page：24 Pages

8-bit serial-in/parallel-out shift register

GENERAL DESCRIPTION The 74HC/HCT164 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Gated serial data inputs • Asynchronous master reset • Output capability: sta

High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register

文件：47.58 Kbytes Page：7 Pages

High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register

文件：47.58 Kbytes Page：7 Pages

High Speed CMOS Logic 8-Bit Serial-In/Parallel-Out Shift Register

文件：47.58 Kbytes Page：7 Pages

8 BIT SIPO SHIFT REGISTER

文件：252.98 Kbytes Page：12 Pages