Presettable synchronous BCD decade counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT160 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

Presettable synchronous BCD decade counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT160 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

Presettable synchronous BCD decade counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT160 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC SYNC BCD DECADE COUNT 16SOIC 集成电路（IC） 计数器，除法器

封装/外壳：16-SOIC（0.154"，3.90mm 宽） 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC SYNC BCD DECADE COUNT 16SOIC 集成电路（IC） 计数器，除法器

Presettable synchronous BCD decade counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT160 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive

Presettable synchronous BCD decade counter; asynchronous reset

GENERAL DESCRIPTION The 74HC/HCT160 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Synchronous counting and loading • Two count enable inputs for n-bit cascading • Positive