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74HCT15价格

参考价格:¥0.6468

型号:74HCT151D,652 品牌:NXP 备注:这里有74HCT15多少钱,2026年最近7天走势,今日出价,今日竞价,74HCT15批发/采购报价,74HCT15行情走势销售排行榜,74HCT15报价。
型号 功能描述 生产厂家 企业 LOGO 操作

8-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT151 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • True and complement outputs • Multifunction capability • Permits multiplexing

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8-input multiplexer

1. General description The 74HC151; 74HCT151 is an 8-bit multiplexer with eight binary inputs (I0 to I7), three select inputs (S0 to S2) and an enable input (E). One of the eight binary inputs is selected by the select inputs and routed to the complementary outputs (Y and Y). A HIGH on E forces

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8-input multiplexer

1. General description The 74HC151; 74HCT151 is an 8-bit multiplexer with eight binary inputs (I0 to I7), three select inputs (S0 to S2) and an enable input (E). One of the eight binary inputs is selected by the select inputs and routed to the complementary outputs (Y and Y). A HIGH on E forces

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8-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT151 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • True and complement outputs • Multifunction capability • Permits multiplexing

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8-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT151 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • True and complement outputs • Multifunction capability • Permits multiplexing

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74HCT151DB - 8-input multiplexer

8-input multiplexer - The 74HC151; 74HCT151 are 8-bit multiplexer with eight binary inputs (I0 to I7), three select inputs (S0 to S2) and an enable input (E). One of the eight binary inputs is selected by the select inputs and routed to the complementary outputs (Y and Y). A HIGH on E forces the out ·Specified in compliance with JEDEC standard no. 7A\n·Input levels:·For 74HC151: CMOS level\n·For 74HCT151: TTL level;

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8-input multiplexer

The 74HC151-Q100; 74HCT151-Q100 are 8-bit multiplexer with eight binary inputs (I0 to I7), three select inputs (S0 to S2) and an enable input (E). One of the eight binary inputs is selected by the select inputs and routed to the complementary outputs (Y and Y). A HIGH on E forces the output Y LOW an • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• Specified in compliance with JEDEC standard no. 7A\n• Input levels:• For 74HC151-Q100: CMOS level\n• For 74HCT151-Q100: TTL level\n\n• Low-power dissipation\n• No;

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8-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT151 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • True and complement outputs • Multifunction capability • Permits multiplexing

PHILIPS

飞利浦

8-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT151 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • True and complement outputs • Multifunction capability • Permits multiplexing

PHILIPS

飞利浦

8-input multiplexer

The 74HC151; 74HCT151 are 8-bit multiplexer with eight binary inputs (I0 to I7), three select inputs (S0 to S2) and an enable input (E). One of the eight binary inputs is selected by the select inputs and routed to the complementary outputs (Y and Y). A HIGH on E forces the output Y LOW and output Y • Specified in compliance with JEDEC standard no. 7A\n• Input levels:• For 74HC151: CMOS level\n• For 74HCT151: TTL level\n\n• Low-power dissipation\n• Non-inverting data path\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\n\n• Multiple package options\n• Speci;

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8-input multiplexer

1. General description The 74HC151; 74HCT151 is an 8-bit multiplexer with eight binary inputs (I0 to I7), three select inputs (S0 to S2) and an enable input (E). One of the eight binary inputs is selected by the select inputs and routed to the complementary outputs (Y and Y). A HIGH on E forces

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Dual 4-input multiplexer

1. General description The 74HC153; 74HCT153 is a dual 4-input multiplexer. The device features independent enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer output (nY). A

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Dual 4-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT153 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT153 have two identical 4-input multiplexers which select two bits of data from up to fo

PHILIPS

飞利浦

Dual 4-input multiplexer

1. General description The 74HC153; 74HCT153 is a dual 4-input multiplexer. The device features independent enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer output (nY). A

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Dual 4-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT153 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT153 have two identical 4-input multiplexers which select two bits of data from up to fo

PHILIPS

飞利浦

Dual 4-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT153 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT153 have two identical 4-input multiplexers which select two bits of data from up to fo

PHILIPS

飞利浦

Dual 4-input multiplexer

1. General description The 74HC153-Q100; 74HCT153-Q100 is a dual 4-input multiplexer. The device features independent enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer outpu

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Dual 4-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT153 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT153 have two identical 4-input multiplexers which select two bits of data from up to fo

PHILIPS

飞利浦

Dual 4-input multiplexer

1. General description The 74HC153; 74HCT153 is a dual 4-input multiplexer. The device features independent enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer output (nY). A

NEXPERIA

安世

Dual 4-input multiplexer

1. General description The 74HC153-Q100; 74HCT153-Q100 is a dual 4-input multiplexer. The device features independent enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer outpu

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Dual 4-input multiplexer

1. General description The 74HC153-Q100; 74HCT153-Q100 is a dual 4-input multiplexer. The device features independent enable inputs (nE) and common data select inputs (S0 and S1). For each multiplexer, the select inputs select one of the four binary inputs and routes it to the multiplexer outpu

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4-to-16 line decoder/demultiplexer

1. General description The 74HC154; 74HCT154 is a 4-to-16 line decoder/demultiplexer. It decodes four binary weighted address inputs (A0 to A3) to sixteen mutually exclusive outputs (Y0 to Y15). The device features two input enable (E0 and E1) inputs. A HIGH on either of the input enables force

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4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

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4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

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4-to-16 line decoder/demultiplexer

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4-to-16 line decoder/demultiplexer

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4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

PHILIPS

飞利浦

4-to-16 line decoder/demultiplexer

1. General description The 74HC154; 74HCT154 is a 4-to-16 line decoder/demultiplexer. It decodes four binary weighted address inputs (A0 to A3) to sixteen mutually exclusive outputs (Y0 to Y15). The device features two input enable (E0 and E1) inputs. A HIGH on either of the input enables force

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安世

4-to-16 line decoder/demultiplexer

1. General description The 74HC154; 74HCT154 is a 4-to-16 line decoder/demultiplexer. It decodes four binary weighted address inputs (A0 to A3) to sixteen mutually exclusive outputs (Y0 to Y15). The device features two input enable (E0 and E1) inputs. A HIGH on either of the input enables force

NEXPERIA

安世

4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

PHILIPS

飞利浦

4-to-16 line decoder/demultiplexer

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4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

PHILIPS

飞利浦

4-to-16 line decoder/demultiplexer

ETC

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4-to-16 line decoder/demultiplexer

ETC

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4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

PHILIPS

飞利浦

4-to-16 line decoder/demultiplexer

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4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

PHILIPS

飞利浦

4-to-16 line decoder/demultiplexer

1. General description The 74HC154; 74HCT154 is a 4-to-16 line decoder/demultiplexer. It decodes four binary weighted address inputs (A0 to A3) to sixteen mutually exclusive outputs (Y0 to Y15). The device features two input enable (E0 and E1) inputs. A HIGH on either of the input enables force

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Quad 2-input multiplexer

1. General description The 74HC157; 74HCT157 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use of current

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Quad 2?묲nput Data Selectors / Multiplexers High?뭁erformance Silicon?묰ate CMOS

The 74HCT157 is identical in pinout to the LS157. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device routes 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the

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Quad 2-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT157 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • Output capability: standard • ICC category: MSI

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Quad 2-input multiplexer

1. General description The 74HC157; 74HCT157 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use of current

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Quad 2-input multiplexer

1. General description The 74HC157-Q100; 74HCT157-Q100 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use

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Quad 2-input multiplexer

1. General description The 74HC157; 74HCT157 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use of current

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Quad 2-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT157 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • Output capability: standard • ICC category: MSI

PHILIPS

飞利浦

Quad 2-input multiplexer

1. General description The 74HC157-Q100; 74HCT157-Q100 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use

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安世

Quad 2?묲nput Data Selectors / Multiplexers High?뭁erformance Silicon?묰ate CMOS

The 74HCT157 is identical in pinout to the LS157. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device routes 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the

ONSEMI

安森美半导体

Quad 2?묲nput Data Selectors / Multiplexers High?뭁erformance Silicon?묰ate CMOS

The 74HCT157 is identical in pinout to the LS157. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device routes 2 nibbles (A or B) to a single port (Y) as determined by the Select input. The data is presented at the

ONSEMI

安森美半导体

Quad 2-input multiplexer

GENERAL DESCRIPTION The 74HC/HCT157 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Non-inverting data path • Output capability: standard • ICC category: MSI

PHILIPS

飞利浦

Quad 2-input multiplexer

1. General description The 74HC157; 74HCT157 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use of current

NEXPERIA

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Quad 2-input multiplexer

1. General description The 74HC157-Q100; 74HCT157-Q100 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use

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Quad 2-input multiplexer

1. General description The 74HC157-Q100; 74HCT157-Q100 is a quad 2-input multiplexer. The device features select (S) and enable E inputs. A HIGH on S selects data source 1, a LOW data source 0. A HIGH on E forces all the outputs (1Y to 4Y) LOW. Inputs include clamp diodes. This enables the use

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Quad 2-input multiplexer; inverting

GENERAL DESCRIPTION The 74HC/HCT158 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inverting data path • Output capability: standard • ICC category: MSI

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Quad 2-input multiplexer; inverting

GENERAL DESCRIPTION The 74HC/HCT158 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inverting data path • Output capability: standard • ICC category: MSI

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Quad 2-input multiplexer; inverting

GENERAL DESCRIPTION The 74HC/HCT158 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • Inverting data path • Output capability: standard • ICC category: MSI

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飞利浦

封装/外壳:16-SOIC(0.154",3.90mm 宽) 包装:管件 描述:IC MULTIPLEXER 1 X 8:1 16SO 集成电路(IC) 信号开关,多路复用器,解码器

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封装/外壳:16-SOIC(0.154",3.90mm 宽) 包装:卷带(TR) 描述:IC MULTIPLEXER 1 X 8:1 16SO 集成电路(IC) 信号开关,多路复用器,解码器

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8-input multiplexer

文件:764.78 Kbytes Page:17 Pages

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8-input multiplexer

文件:764.78 Kbytes Page:17 Pages

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Dual 4-input multiplexer

文件:236.82 Kbytes Page:14 Pages

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74HCT15产品属性

  • 类型

    描述

  • VCC (V):

    4.5 - 5.5

  • Logic switching levels:

    TTL

  • Output drive capability (mA):

    ± 4

  • tpd (ns):

    19

  • Power dissipation considerations:

    low

  • Tamb (°C):

    -40~125

  • Rth(j-a) (K/W):

    91

  • Ψth(j-top) (K/W):

    8.9

  • Rth(j-c) (K/W):

    50

  • Package name:

    SO16

更新时间:2026-7-24 13:39:00
IC供应商 芯片型号 品牌 批号 封装 库存 备注 价格
7631+
DIP-14
22
原装现货海量库存欢迎咨询
TI/德州仪器
DIP
10
全新、原装
ON Semiconductor
24+
16-TSSOP
56300
一级代理/放心采购
ON
23+
TSSOP16
530
全新原装正品现货,支持订货
JRC/新日本无线
23+
DIP-14
4750
原厂授权代理,海外优势订货渠道。可提供大量库存,详
ON
22+
TSSOP16
20000
公司只有原装 品质保证
三年内
1983
只做原装正品
26+
N/A
51000
一级代理-主营优势-实惠价格-不悔选择
National Semiconductor
24+25+
16500
全新原厂原装现货!受权代理!可送样可提供技术支持!
ON
25+23+
TSSOP16
68282
绝对原装正品现货,全新深圳原装进口现货

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