4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

4-to-16 line decoder/demultiplexer

4-to-16 line decoder/demultiplexer

The 74HC154; 74HCT154 is a 4-to-16 line decoder/demultiplexer. It decodes four binary weighted address inputs (A0 to A3) to sixteen mutually exclusive outputs (Y0 to Y15). The device features two input enable (E0 and E1) inputs. A HIGH on either of the input enables forces the outputs HIGH. The devi • 16-line demultiplexing capability\n• Decodes 4 binary-coded inputs into 16 mutually-exclusive outputs\n• Complies with JEDEC standard no. 7A\n• Input levels:• For 74HC154: CMOS level\n• For 74HCT154: TTL level\n\n• ESD protection:• HBM JESD22-A114F exceeds 2000 V\n• MM JESD22-A115-A exceeds 200 V\;

封装/外壳：24-SSOP（0.209"，5.30mm 宽） 包装：管件 描述：IC DECODER/DEMUX 1X4:16 24SSOP 集成电路（IC） 信号开关，多路复用器，解码器

封装/外壳：24-SSOP（0.209"，5.30mm 宽） 包装：管件 描述：IC DECODER/DEMUX 1X4:16 24SSOP 集成电路（IC） 信号开关，多路复用器，解码器

4-to-16 line decoder/demultiplexer

GENERAL DESCRIPTION The 74HC/HCT154 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 16-line demultiplexing capability • Decodes 4 binary-coded inputs into one of 16

High-Speed CMOS Logic 4- to 16-Line Decoder/Demultiplexer

文件：229.49 Kbytes Page：14 Pages

High Speed CMOS Logic 4-to-16 Line Decoder/Demultiplexer

文件：42.59 Kbytes Page：6 Pages

High Speed CMOS Logic 4-to-16 Line Decoder/Demultiplexer

文件：42.59 Kbytes Page：6 Pages

High Speed CMOS Logic 4-to-16 Line Decoder/Demultiplexer

文件：42.59 Kbytes Page：6 Pages