DualD-TypeFlipFlopPresetandClear

Features •Highspeed:fmax=77MHz(typ.)atVCC=5V •Lowpowerdissipation:ICC=2µA(max)atTa=25°C •Highnoiseimmunity:VNIH=VNIL=28VCC(min) •Outputdrivecapability:10LSTTLloads •Symmetricaloutputimpedance:|IOH|=IOL=4mA(min) •Balancedpropagationdelays:

DualDFlip?묯lopwithSetandResetHigh?뭁erformanceSilicon?묰ateCMOS

The74HC74isidenticalinpinouttotheLS74.ThedeviceinputsarecompatiblewithstandardCMOSoutputs;withpullupresistors,theyarecompatiblewithLSTTLoutputs. ThisdeviceconsistsoftwoDflip−flopswithindividualSet,Reset,andClockinputs.InformationataD−inputistransferred

DualD-typeflip-flopwithsetandreset;positive-edgetrigger

DualD-typeflip-flopwithsetandreset;positiveedge-trigger

1.Generaldescription The74HC74and74HCT74aredualpositiveedgetriggeredD-typeflip-flop.Theyhaveindividual data(nD),clock(nCP),set(nSD)andreset(nRD)inputs,andcomplementarynQandnQoutputs. DataatthenD-input,thatmeetstheset-upandholdtimerequirementsontheLOW-

HighSpeedCMOSLogic

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DualD-typeflip-flopwithsetandreset;positiveedge-trigger