Dual D-Type Flip Flop Preset and Clear

Features • High speed: fmax = 77 MHz (typ.) at VCC = 5 V • Low power dissipation: ICC = 2 µA (max) at Ta = 25°C • High noise immunity: VNIH = VNIL = 28 VCC (min) • Output drive capability: 10 LSTTL loads • Symmetrical output impedance: |IOH| = IOL = 4 mA (min) • Balanced propagation delays:

Dual D Flip-Flop with Set and Reset

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS The MC74HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with indi

Dual D Flip-Flop with Set and Reset

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS The MC74HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with indi

Dual D Flip-Flop with Set and Reset

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS The MC74HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with indi

Dual D Flip-Flop with Set and Reset

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS The MC74HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with indi

Dual D Flip-Flop with Set and Reset

Dual D Flip−Flop with Set and Reset High−Performance Silicon−Gate CMOS The MC74HC74A is identical in pinout to the LS74. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of two D flip−flops with indi