Octal D-type flip-flop; positive edge-trigger; 3-state

GENERAL DESCRIPTION The 74HC/HCT574 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state non-inverting outputs for bus oriented applications • 8-bit positive edge-triggere

Octal D-type flip-flop; positive edge-trigger; 3-state

1. General description The 74HC574; 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirement

Octal D-type flip-flop; positive-edge trigger; 3-state

The 74HC574; 74HCT574 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requirements on the LOW-to-HIGH clock ( • Input levels:• For 74HC574: CMOS level\n• For 74HCT574: TTL level\n\n• 3-state non-inverting outputs for bus oriented applications\n• 8-bit positive, edge-triggered register\n• Common 3-state output enable input\n• Complies with JEDEC standard no. 7 A\n• Multiple package options\n• ESD protection:;

Octal D-type flip-flop; positive edge-trigger; 3-state

The 74HC574-Q100; 74HCT574-Q100 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL. It is specified in compliance with JEDEC standard no. 7A.\n The 74HC574-Q100; 74HCT574-Q100 are octal D-type flip-flops featuring separate D-type inputs for each flip-flop and 3- • Automotive product qualification in accordance with AEC-Q100 (Grade 1)• Specified from -40 °C to +85 °C and from -40 °C to +125 °C\n\n• 3-state non-inverting outputs for bus-oriented applications\n• 8-bit positive, edge-triggered register\n• Common 3-state output enable input\n• ESD protection:• M;

Octal D-type flip-flop; positive edge-trigger; 3-state

General description The 74HC574-Q100; 74HCT574-Q100 is an 8-bit positive-edge triggered D-type flip-flop with 3-state outputs. The device features a clock (CP) and output enable (OE) inputs. The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time requir

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 功能：标准 包装：卷带（TR）剪切带（CT）Digi-Reel® 得捷定制卷带 描述：IC FF D-TYPE SNGL 8BIT 20TSSOP 集成电路（IC） 触发器

封装/外壳：20-TSSOP（0.173"，4.40mm 宽） 功能：标准 包装：管件 描述：IC FF D-TYPE SNGL 8BIT 20TSSOP 集成电路（IC） 触发器

Octal D-type flip-flop; positive edge-trigger; 3-state

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Octal D-type flip-flop; positive edge-trigger; 3-state

GENERAL DESCRIPTION The 74HC/HCT574 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. FEATURES • 3-state non-inverting outputs for bus oriented applications • 8-bit positive edge-triggere

Octal 3-State Noninverting D Flip-Flop

The MC74HC574A is identical in pinout to the LS574. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. Data meeting the set−up time is clocked to the outputs with the rising edge of the Clock. The Output Enable input does no

Octal 3-State Noninverting D Flip-Flop

The MC74HC574A is identical in pinout to the LS574. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. Data meeting the set−up time is clocked to the outputs with the rising edge of the Clock. The Output Enable input does no

Octal 3-State Noninverting D Flip-Flop

The MC74HC574A is identical in pinout to the LS574. The device inputs are compatible with standard CMOS outputs; with pull−up resistors, they are compatible with LSTTL outputs. Data meeting the set−up time is clocked to the outputs with the rising edge of the Clock. The Output Enable input does no