BCD TO DECIMAL DECODER

DESCRIPTION The M54/74HC42 is a high speed CMOS BCD-TO-DECIMAL DECODER fabricated in silicon gate C2MOS technology. It has the same high speed performance of LSTTL combined with true CMOS low power consumption. ■ HIGH SPEED tPD = 13 ns (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MA

BCD to decimal decoder

Features  High speed: tpd = 14 ns (typ.) at VCC = 6 V  Low power dissipation: ICC = 4 A (max.) at TA = 25 °C  High noise immunity: VNIH = VNIL = 28% VCC (min.)  Symmetrical output impedance: |IOH| = IOL = 4 mA (min.)  Balanced propagation delays: tPLH  tPHL  Wide operating vol