8 BIT SIPO SHIFT LATCH REGISTER (3-STATE)

DESCRIPTION The M54/74HC4094 is a high speed CMOS 8 BIT SIPOSHIFT LATCH REGISTER fabricated with silicon gate C2MOS technology. ■ HIGH SPEED fMAX = 73 MHz (TYP.) AT VCC = 5 V ■ LOW POWER DISSIPATION ICC = 4 µA (MAX.) AT TA = 25 °C ■ HIGH NOISE IMMUNITY VNIH = VNIL = 28 VCC (MIN.)

8-bit SIPO shift latch register (3-state)

Features • High speed: fMAX = 80 MHz (typ.) at VCC = 6 V • Low power dissipation: ICC = 4 μA (max.) at TA= 25 °C • High noise immunity: VNIH = VNIL = 28% VCC (min.) • Symmetrical output impedance: |IOH| = IOL = 4 mA (min.) • Balanced propagation delays: tPLH ≅ tPHL • Wide operating vo