High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs

Features • Fully Static Operation • Buffered Inputs • Common Reset • Positive Edge Clocking • Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . .

High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs

Features • Fully Static Operation • Buffered Inputs • Common Reset • Positive Edge Clocking • Typical fMAX = 50MHz at VCC = 5V, CL = 15pF, TA = 25oC • Fanout (Over Temperature Range) - Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads - Bus Driver Outputs . . . . . . . . . . .

High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs

文件：347.51 Kbytes Page：14 Pages

High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs

文件：497.87 Kbytes Page：16 Pages

High-Speed CMOS Logic Decade Counter/Divider with 10 Decoded Outputs

文件：528.36 Kbytes Page：16 Pages